63 lines
1.7 KiB
C
63 lines
1.7 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef MFD_TMIO_H
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#define MFD_TMIO_H
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#include <linux/platform_device.h>
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#include <linux/types.h>
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/* TMIO MMC platform flags */
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/*
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* Some controllers can support a 2-byte block size when the bus width is
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* configured in 4-bit mode.
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*/
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#define TMIO_MMC_BLKSZ_2BYTES BIT(1)
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/* Some controllers can support SDIO IRQ signalling */
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#define TMIO_MMC_SDIO_IRQ BIT(2)
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/* Some features are only available or tested on R-Car Gen2 or later */
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#define TMIO_MMC_MIN_RCAR2 BIT(3)
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/*
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* Some controllers require waiting for the SD bus to become idle before
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* writing to some registers.
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*/
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#define TMIO_MMC_HAS_IDLE_WAIT BIT(4)
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/*
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* Use the busy timeout feature. Probably all TMIO versions support it. Yet,
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* we don't have documentation for old variants, so we enable only known good
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* variants with this flag. Can be removed once all variants are known good.
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*/
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#define TMIO_MMC_USE_BUSY_TIMEOUT BIT(5)
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/* Some controllers have CMD12 automatically issue/non-issue register */
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#define TMIO_MMC_HAVE_CMD12_CTRL BIT(7)
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/* Controller has some SDIO status bits which must be 1 */
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#define TMIO_MMC_SDIO_STATUS_SETBITS BIT(8)
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/* Some controllers have a 32-bit wide data port register */
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#define TMIO_MMC_32BIT_DATA_PORT BIT(9)
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/* Some controllers allows to set SDx actual clock */
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#define TMIO_MMC_CLK_ACTUAL BIT(10)
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/* Some controllers have a CBSY bit */
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#define TMIO_MMC_HAVE_CBSY BIT(11)
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struct tmio_mmc_data {
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void *chan_priv_tx;
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void *chan_priv_rx;
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unsigned int hclk;
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unsigned long capabilities;
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unsigned long capabilities2;
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unsigned long flags;
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u32 ocr_mask; /* available voltages */
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dma_addr_t dma_rx_offset;
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unsigned int max_blk_count;
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unsigned short max_segs;
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};
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#endif
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