119 lines
3.2 KiB
YAML
119 lines
3.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/qcom,sm4250-lpass-lpi-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm SM4250 SoC LPASS LPI TLMM
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maintainers:
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- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
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description:
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Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem
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(LPASS) Low Power Island (LPI) of Qualcomm SM4250 SoC.
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properties:
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compatible:
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const: qcom,sm4250-lpass-lpi-pinctrl
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reg:
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items:
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- description: LPASS LPI TLMM Control and Status registers
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- description: LPASS LPI MCC registers
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clocks:
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items:
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- description: LPASS Audio voting clock
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clock-names:
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items:
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- const: audio
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patternProperties:
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"-state$":
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oneOf:
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- $ref: "#/$defs/qcom-sm4250-lpass-state"
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- patternProperties:
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"-pins$":
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$ref: "#/$defs/qcom-sm4250-lpass-state"
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additionalProperties: false
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$defs:
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qcom-sm4250-lpass-state:
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type: object
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description:
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Pinctrl node's client devices use subnodes for desired pin configuration.
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Client device subnodes use below standard properties.
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$ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
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unevaluatedProperties: false
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properties:
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pins:
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description:
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List of gpio pins affected by the properties specified in this
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subnode.
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items:
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pattern: "^gpio([0-9]|1[0-9]|2[0-6])$"
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function:
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enum: [ gpio, dmic01_clk, dmic01_data, dmic23_clk, dmic23_data,
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dmic4_clk, dmic4_data, ext_mclk0_a, ext_mclk0_b, ext_mclk1_a,
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ext_mclk1_b, ext_mclk1_c, i2s1_clk, i2s1_data, i2s1_ws,
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i2s2_clk, i2s2_data, i2s2_ws, i2s3_clk, i2s3_data, i2s3_ws,
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qua_mi2s_data, qua_mi2s_sclk, qua_mi2s_ws, slim_clk, slim_data,
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swr_rx_clk, swr_rx_data, swr_tx_clk, swr_tx_data, swr_wsa_clk,
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swr_wsa_data ]
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description:
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Specify the alternative function to be configured for the specified
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pins.
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allOf:
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- $ref: qcom,lpass-lpi-common.yaml#
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/sound/qcom,q6afe.h>
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lpi_tlmm: pinctrl@a7c0000 {
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compatible = "qcom,sm4250-lpass-lpi-pinctrl";
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reg = <0xa7c0000 0x20000>,
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<0xa950000 0x10000>;
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clocks = <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
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clock-names = "audio";
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&lpi_tlmm 0 0 19>;
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i2s2-active-state {
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clk-pins {
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pins = "gpio10";
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function = "i2s2_clk";
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drive-strength = <2>;
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slew-rate = <1>;
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bias-disable;
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};
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data-pins {
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pins = "gpio12";
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function = "i2s2_data";
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drive-strength = <2>;
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slew-rate = <1>;
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};
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};
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i2s2-sleep-clk-state {
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pins = "gpio10";
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function = "i2s2_clk";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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