98 lines
1.8 KiB
YAML
98 lines
1.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/rockchip,rk3228-hdmi-phy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Rockchip HDMI PHY with Innosilicon IP block
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maintainers:
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- Heiko Stuebner <heiko@sntech.de>
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properties:
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compatible:
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enum:
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- rockchip,rk3228-hdmi-phy
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- rockchip,rk3328-hdmi-phy
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reg:
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maxItems: 1
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clocks:
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maxItems: 3
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clock-names:
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items:
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- const: sysclk
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- const: refoclk
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- const: refpclk
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clock-output-names:
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description:
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The hdmiphy output clock name, that gets fed back to the CRU.
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"#clock-cells":
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const: 0
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interrupts:
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maxItems: 1
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nvmem-cells:
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maxItems: 1
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description: A phandle + nvmem specifier for the cpu-version efuse
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for adjustment to some frequency settings, depending on cpu-version
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nvmem-cell-names:
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items:
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- const: cpu-version
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'#phy-cells':
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const: 0
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- clock-output-names
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- '#clock-cells'
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- '#phy-cells'
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allOf:
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- if:
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properties:
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compatible:
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contains:
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const: rockchip,rk3228-hdmi-phy
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then:
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properties:
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interrupts: false
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- if:
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properties:
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compatible:
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contains:
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const: rockchip,rk3328-hdmi-phy
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then:
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required:
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- interrupts
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/rk3228-cru.h>
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hdmi_phy: phy@12030000 {
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compatible = "rockchip,rk3228-hdmi-phy";
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reg = <0x12030000 0x10000>;
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#phy-cells = <0>;
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clocks = <&cru PCLK_HDMI_PHY>, <&xin24m>, <&cru DCLK_HDMI_PHY>;
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clock-names = "sysclk", "refoclk", "refpclk";
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#clock-cells = <0>;
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clock-output-names = "hdmi_phy";
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};
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