100 lines
2.4 KiB
YAML
100 lines
2.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright (c) 2024 Linaro Limited
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/wireless/qcom,ath12k.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Technologies ath12k wireless devices (PCIe)
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maintainers:
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- Jeff Johnson <quic_jjohnson@quicinc.com>
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- Kalle Valo <kvalo@kernel.org>
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description:
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Qualcomm Technologies IEEE 802.11be PCIe devices.
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properties:
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compatible:
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enum:
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- pci17cb,1107 # WCN7850
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reg:
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maxItems: 1
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vddaon-supply:
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description: VDD_AON supply regulator handle
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vddwlcx-supply:
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description: VDD_WLCX supply regulator handle
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vddwlmx-supply:
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description: VDD_WLMX supply regulator handle
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vddrfacmn-supply:
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description: VDD_RFA_CMN supply regulator handle
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vddrfa0p8-supply:
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description: VDD_RFA_0P8 supply regulator handle
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vddrfa1p2-supply:
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description: VDD_RFA_1P2 supply regulator handle
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vddrfa1p8-supply:
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description: VDD_RFA_1P8 supply regulator handle
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vddpcie0p9-supply:
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description: VDD_PCIE_0P9 supply regulator handle
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vddpcie1p8-supply:
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description: VDD_PCIE_1P8 supply regulator handle
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required:
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- compatible
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- reg
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- vddaon-supply
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- vddwlcx-supply
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- vddwlmx-supply
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- vddrfacmn-supply
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- vddrfa0p8-supply
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- vddrfa1p2-supply
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- vddrfa1p8-supply
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- vddpcie0p9-supply
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- vddpcie1p8-supply
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/gpio/gpio.h>
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pcie {
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#address-cells = <3>;
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#size-cells = <2>;
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pcie@0 {
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device_type = "pci";
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reg = <0x0 0x0 0x0 0x0 0x0>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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bus-range = <0x01 0xff>;
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wifi@0 {
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compatible = "pci17cb,1107";
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reg = <0x10000 0x0 0x0 0x0 0x0>;
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vddaon-supply = <&vreg_pmu_aon_0p59>;
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vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
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vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
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vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
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vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
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vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
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vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
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vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>;
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vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>;
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};
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};
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};
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