530 lines
16 KiB
C
530 lines
16 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2018 MediaTek Inc.
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*
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*/
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#ifndef __MTK_CMDQ_H__
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#define __MTK_CMDQ_H__
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#include <linux/mailbox_client.h>
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#include <linux/mailbox/mtk-cmdq-mailbox.h>
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#include <linux/timer.h>
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#define CMDQ_ADDR_HIGH(addr) ((u32)(((addr) >> 16) & GENMASK(31, 0)))
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#define CMDQ_ADDR_LOW(addr) ((u16)(addr) | BIT(1))
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/*
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* Every cmdq thread has its own SPRs (Specific Purpose Registers),
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* so there are 4 * N (threads) SPRs in GCE that shares the same indexes below.
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*/
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#define CMDQ_THR_SPR_IDX0 (0)
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#define CMDQ_THR_SPR_IDX1 (1)
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#define CMDQ_THR_SPR_IDX2 (2)
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#define CMDQ_THR_SPR_IDX3 (3)
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struct cmdq_pkt;
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enum cmdq_logic_op {
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CMDQ_LOGIC_ASSIGN = 0,
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CMDQ_LOGIC_ADD = 1,
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CMDQ_LOGIC_SUBTRACT = 2,
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CMDQ_LOGIC_MULTIPLY = 3,
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CMDQ_LOGIC_XOR = 8,
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CMDQ_LOGIC_NOT = 9,
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CMDQ_LOGIC_OR = 10,
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CMDQ_LOGIC_AND = 11,
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CMDQ_LOGIC_LEFT_SHIFT = 12,
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CMDQ_LOGIC_RIGHT_SHIFT = 13,
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CMDQ_LOGIC_MAX,
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};
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struct cmdq_operand {
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/* register type */
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bool reg;
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union {
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/* index */
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u16 idx;
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/* value */
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u16 value;
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};
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};
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struct cmdq_client_reg {
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u8 subsys;
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u16 offset;
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u16 size;
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};
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struct cmdq_client {
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struct mbox_client client;
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struct mbox_chan *chan;
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};
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#if IS_ENABLED(CONFIG_MTK_CMDQ)
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/**
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* cmdq_dev_get_client_reg() - parse cmdq client reg from the device
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* node of CMDQ client
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* @dev: device of CMDQ mailbox client
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* @client_reg: CMDQ client reg pointer
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* @idx: the index of desired reg
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*
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* Return: 0 for success; else the error code is returned
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*
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* Help CMDQ client parsing the cmdq client reg
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* from the device node of CMDQ client.
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*/
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int cmdq_dev_get_client_reg(struct device *dev,
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struct cmdq_client_reg *client_reg, int idx);
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/**
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* cmdq_mbox_create() - create CMDQ mailbox client and channel
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* @dev: device of CMDQ mailbox client
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* @index: index of CMDQ mailbox channel
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*
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* Return: CMDQ mailbox client pointer
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*/
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struct cmdq_client *cmdq_mbox_create(struct device *dev, int index);
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/**
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* cmdq_mbox_destroy() - destroy CMDQ mailbox client and channel
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* @client: the CMDQ mailbox client
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*/
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void cmdq_mbox_destroy(struct cmdq_client *client);
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/**
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* cmdq_pkt_create() - create a CMDQ packet
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* @client: the CMDQ mailbox client
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* @pkt: the CMDQ packet
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* @size: required CMDQ buffer size
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*
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* Return: 0 for success; else the error code is returned
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*/
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int cmdq_pkt_create(struct cmdq_client *client, struct cmdq_pkt *pkt, size_t size);
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/**
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* cmdq_pkt_destroy() - destroy the CMDQ packet
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* @client: the CMDQ mailbox client
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* @pkt: the CMDQ packet
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*/
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void cmdq_pkt_destroy(struct cmdq_client *client, struct cmdq_pkt *pkt);
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/**
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* cmdq_pkt_write() - append write command to the CMDQ packet
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* @pkt: the CMDQ packet
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* @subsys: the CMDQ sub system code
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* @offset: register offset from CMDQ sub system
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* @value: the specified target register value
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*
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* Return: 0 for success; else the error code is returned
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*/
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int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value);
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/**
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* cmdq_pkt_write_mask() - append write command with mask to the CMDQ packet
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* @pkt: the CMDQ packet
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* @subsys: the CMDQ sub system code
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* @offset: register offset from CMDQ sub system
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* @value: the specified target register value
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* @mask: the specified target register mask
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*
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* Return: 0 for success; else the error code is returned
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*/
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int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
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u16 offset, u32 value, u32 mask);
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/*
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* cmdq_pkt_read_s() - append read_s command to the CMDQ packet
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* @pkt: the CMDQ packet
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* @high_addr_reg_idx: internal register ID which contains high address of pa
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* @addr_low: low address of pa
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* @reg_idx: the CMDQ internal register ID to cache read data
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*
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* Return: 0 for success; else the error code is returned
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*/
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int cmdq_pkt_read_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, u16 addr_low,
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u16 reg_idx);
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/**
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* cmdq_pkt_write_s() - append write_s command to the CMDQ packet
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* @pkt: the CMDQ packet
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* @high_addr_reg_idx: internal register ID which contains high address of pa
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* @addr_low: low address of pa
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* @src_reg_idx: the CMDQ internal register ID which cache source value
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*
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* Return: 0 for success; else the error code is returned
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*
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* Support write value to physical address without subsys. Use CMDQ_ADDR_HIGH()
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* to get high address and call cmdq_pkt_assign() to assign value into internal
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* reg. Also use CMDQ_ADDR_LOW() to get low address for addr_low parameter when
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* call to this function.
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*/
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int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,
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u16 addr_low, u16 src_reg_idx);
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/**
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* cmdq_pkt_write_s_mask() - append write_s with mask command to the CMDQ packet
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* @pkt: the CMDQ packet
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* @high_addr_reg_idx: internal register ID which contains high address of pa
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* @addr_low: low address of pa
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* @src_reg_idx: the CMDQ internal register ID which cache source value
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* @mask: the specified target address mask, use U32_MAX if no need
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*
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* Return: 0 for success; else the error code is returned
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*
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* Support write value to physical address without subsys. Use CMDQ_ADDR_HIGH()
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* to get high address and call cmdq_pkt_assign() to assign value into internal
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* reg. Also use CMDQ_ADDR_LOW() to get low address for addr_low parameter when
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* call to this function.
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*/
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int cmdq_pkt_write_s_mask(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,
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u16 addr_low, u16 src_reg_idx, u32 mask);
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/**
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* cmdq_pkt_write_s_value() - append write_s command to the CMDQ packet which
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* write value to a physical address
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* @pkt: the CMDQ packet
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* @high_addr_reg_idx: internal register ID which contains high address of pa
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* @addr_low: low address of pa
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* @value: the specified target value
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*
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* Return: 0 for success; else the error code is returned
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*/
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int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx,
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u16 addr_low, u32 value);
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/**
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* cmdq_pkt_write_s_mask_value() - append write_s command with mask to the CMDQ
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* packet which write value to a physical
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* address
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* @pkt: the CMDQ packet
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* @high_addr_reg_idx: internal register ID which contains high address of pa
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* @addr_low: low address of pa
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* @value: the specified target value
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* @mask: the specified target mask
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*
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* Return: 0 for success; else the error code is returned
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*/
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int cmdq_pkt_write_s_mask_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx,
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u16 addr_low, u32 value, u32 mask);
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/**
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* cmdq_pkt_mem_move() - append memory move command to the CMDQ packet
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* @pkt: the CMDQ packet
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* @src_addr: source address
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* @dst_addr: destination address
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*
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* Appends a CMDQ command to copy the value found in `src_addr` to `dst_addr`.
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*
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* Return: 0 for success; else the error code is returned
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*/
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int cmdq_pkt_mem_move(struct cmdq_pkt *pkt, dma_addr_t src_addr, dma_addr_t dst_addr);
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/**
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* cmdq_pkt_wfe() - append wait for event command to the CMDQ packet
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* @pkt: the CMDQ packet
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* @event: the desired event type to wait
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* @clear: clear event or not after event arrive
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*
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* Return: 0 for success; else the error code is returned
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*/
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int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event, bool clear);
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/**
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* cmdq_pkt_acquire_event() - append acquire event command to the CMDQ packet
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* @pkt: the CMDQ packet
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* @event: the desired event to be acquired
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*
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* User can use cmdq_pkt_acquire_event() as `mutex_lock` and cmdq_pkt_clear_event()
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* as `mutex_unlock` to protect some `critical section` instructions between them.
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* cmdq_pkt_acquire_event() would wait for event to be cleared.
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* After event is cleared by cmdq_pkt_clear_event in other GCE threads,
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* cmdq_pkt_acquire_event() would set event and keep executing next instruction.
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*
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* Return: 0 for success; else the error code is returned
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*/
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int cmdq_pkt_acquire_event(struct cmdq_pkt *pkt, u16 event);
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/**
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* cmdq_pkt_clear_event() - append clear event command to the CMDQ packet
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* @pkt: the CMDQ packet
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* @event: the desired event to be cleared
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*
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* Return: 0 for success; else the error code is returned
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*/
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int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event);
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/**
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* cmdq_pkt_set_event() - append set event command to the CMDQ packet
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* @pkt: the CMDQ packet
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* @event: the desired event to be set
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*
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* Return: 0 for success; else the error code is returned
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*/
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int cmdq_pkt_set_event(struct cmdq_pkt *pkt, u16 event);
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/**
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* cmdq_pkt_poll() - Append polling command to the CMDQ packet, ask GCE to
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* execute an instruction that wait for a specified
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* hardware register to check for the value w/o mask.
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* All GCE hardware threads will be blocked by this
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* instruction.
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* @pkt: the CMDQ packet
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* @subsys: the CMDQ sub system code
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* @offset: register offset from CMDQ sub system
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* @value: the specified target register value
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*
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* Return: 0 for success; else the error code is returned
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*/
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int cmdq_pkt_poll(struct cmdq_pkt *pkt, u8 subsys,
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u16 offset, u32 value);
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/**
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* cmdq_pkt_poll_mask() - Append polling command to the CMDQ packet, ask GCE to
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* execute an instruction that wait for a specified
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* hardware register to check for the value w/ mask.
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* All GCE hardware threads will be blocked by this
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* instruction.
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* @pkt: the CMDQ packet
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* @subsys: the CMDQ sub system code
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* @offset: register offset from CMDQ sub system
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* @value: the specified target register value
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* @mask: the specified target register mask
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*
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* Return: 0 for success; else the error code is returned
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*/
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int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys,
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u16 offset, u32 value, u32 mask);
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/**
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* cmdq_pkt_logic_command() - Append logic command to the CMDQ packet, ask GCE to
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* execute an instruction that store the result of logic operation
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* with left and right operand into result_reg_idx.
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* @pkt: the CMDQ packet
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* @result_reg_idx: SPR index that store operation result of left_operand and right_operand
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* @left_operand: left operand
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* @s_op: the logic operator enum
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* @right_operand: right operand
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*
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* Return: 0 for success; else the error code is returned
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*/
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int cmdq_pkt_logic_command(struct cmdq_pkt *pkt, u16 result_reg_idx,
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struct cmdq_operand *left_operand,
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enum cmdq_logic_op s_op,
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struct cmdq_operand *right_operand);
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/**
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* cmdq_pkt_assign() - Append logic assign command to the CMDQ packet, ask GCE
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* to execute an instruction that set a constant value into
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* internal register and use as value, mask or address in
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* read/write instruction.
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* @pkt: the CMDQ packet
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* @reg_idx: the CMDQ internal register ID
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* @value: the specified value
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*
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* Return: 0 for success; else the error code is returned
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*/
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int cmdq_pkt_assign(struct cmdq_pkt *pkt, u16 reg_idx, u32 value);
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/**
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* cmdq_pkt_poll_addr() - Append blocking POLL command to CMDQ packet
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* @pkt: the CMDQ packet
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* @addr: the hardware register address
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* @value: the specified target register value
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* @mask: the specified target register mask
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*
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* Appends a polling (POLL) command to the CMDQ packet and asks the GCE
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* to execute an instruction that checks for the specified `value` (with
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* or without `mask`) to appear in the specified hardware register `addr`.
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* All GCE threads will be blocked by this instruction.
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*
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* Return: 0 for success or negative error code
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*/
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int cmdq_pkt_poll_addr(struct cmdq_pkt *pkt, dma_addr_t addr, u32 value, u32 mask);
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/**
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* cmdq_pkt_jump_abs() - Append jump command to the CMDQ packet, ask GCE
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* to execute an instruction that change current thread
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* PC to a absolute physical address which should
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* contains more instruction.
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* @pkt: the CMDQ packet
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* @addr: absolute physical address of target instruction buffer
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* @shift_pa: shift bits of physical address in CMDQ instruction. This value
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* is got by cmdq_get_shift_pa().
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*
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* Return: 0 for success; else the error code is returned
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*/
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int cmdq_pkt_jump_abs(struct cmdq_pkt *pkt, dma_addr_t addr, u8 shift_pa);
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/* This wrapper has to be removed after all users migrated to jump_abs */
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static inline int cmdq_pkt_jump(struct cmdq_pkt *pkt, dma_addr_t addr, u8 shift_pa)
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{
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return cmdq_pkt_jump_abs(pkt, addr, shift_pa);
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}
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/**
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* cmdq_pkt_jump_rel() - Append jump command to the CMDQ packet, ask GCE
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* to execute an instruction that change current thread
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* PC to a physical address with relative offset. The
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* target address should contains more instruction.
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* @pkt: the CMDQ packet
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* @offset: relative offset of target instruction buffer from current PC.
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* @shift_pa: shift bits of physical address in CMDQ instruction. This value
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* is got by cmdq_get_shift_pa().
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*
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* Return: 0 for success; else the error code is returned
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*/
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int cmdq_pkt_jump_rel(struct cmdq_pkt *pkt, s32 offset, u8 shift_pa);
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/**
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* cmdq_pkt_eoc() - Append EOC and ask GCE to generate an IRQ at end of execution
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* @pkt: The CMDQ packet
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*
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* Appends an End Of Code (EOC) command to the CMDQ packet and asks the GCE
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* to generate an interrupt at the end of the execution of all commands in
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* the pipeline.
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* The EOC command is usually appended to the end of the pipeline to notify
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* that all commands are done.
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*
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* Return: 0 for success or negative error number
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*/
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int cmdq_pkt_eoc(struct cmdq_pkt *pkt);
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/**
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* cmdq_pkt_finalize() - Append EOC and jump command to pkt.
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* @pkt: the CMDQ packet
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*
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* Return: 0 for success; else the error code is returned
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*/
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int cmdq_pkt_finalize(struct cmdq_pkt *pkt);
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#else /* IS_ENABLED(CONFIG_MTK_CMDQ) */
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static inline int cmdq_dev_get_client_reg(struct device *dev,
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struct cmdq_client_reg *client_reg, int idx)
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{
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return -ENODEV;
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}
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static inline struct cmdq_client *cmdq_mbox_create(struct device *dev, int index)
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{
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return ERR_PTR(-EINVAL);
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}
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static inline void cmdq_mbox_destroy(struct cmdq_client *client) { }
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static inline int cmdq_pkt_create(struct cmdq_client *client, struct cmdq_pkt *pkt, size_t size)
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{
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return -EINVAL;
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}
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static inline void cmdq_pkt_destroy(struct cmdq_client *client, struct cmdq_pkt *pkt) { }
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static inline int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value)
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{
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return -ENOENT;
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}
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static inline int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
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u16 offset, u32 value, u32 mask)
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{
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return -ENOENT;
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}
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static inline int cmdq_pkt_read_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,
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u16 addr_low, u16 reg_idx)
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{
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return -ENOENT;
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}
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static inline int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,
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u16 addr_low, u16 src_reg_idx)
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{
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return -ENOENT;
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}
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static inline int cmdq_pkt_write_s_mask(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,
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u16 addr_low, u16 src_reg_idx, u32 mask)
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{
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return -ENOENT;
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}
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static inline int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx,
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u16 addr_low, u32 value)
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{
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return -ENOENT;
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}
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static inline int cmdq_pkt_write_s_mask_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx,
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u16 addr_low, u32 value, u32 mask)
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{
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return -ENOENT;
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}
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static inline int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event, bool clear)
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{
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return -EINVAL;
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}
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|
static inline int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
|
|
static inline int cmdq_pkt_set_event(struct cmdq_pkt *pkt, u16 event)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
|
|
static inline int cmdq_pkt_poll(struct cmdq_pkt *pkt, u8 subsys,
|
|
u16 offset, u32 value)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
|
|
static inline int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys,
|
|
u16 offset, u32 value, u32 mask)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
|
|
static inline int cmdq_pkt_assign(struct cmdq_pkt *pkt, u16 reg_idx, u32 value)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
|
|
static inline int cmdq_pkt_poll_addr(struct cmdq_pkt *pkt, dma_addr_t addr, u32 value, u32 mask)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
|
|
static inline int cmdq_pkt_jump_abs(struct cmdq_pkt *pkt, dma_addr_t addr, u8 shift_pa)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
|
|
static inline int cmdq_pkt_jump(struct cmdq_pkt *pkt, dma_addr_t addr, u8 shift_pa)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
|
|
static inline int cmdq_pkt_jump_rel(struct cmdq_pkt *pkt, s32 offset, u8 shift_pa)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
|
|
static inline int cmdq_pkt_eoc(struct cmdq_pkt *pkt)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
|
|
static inline int cmdq_pkt_finalize(struct cmdq_pkt *pkt)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
|
|
#endif /* IS_ENABLED(CONFIG_MTK_CMDQ) */
|
|
|
|
#endif /* __MTK_CMDQ_H__ */
|