136 lines
3.2 KiB
YAML
136 lines
3.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/dma/fsl-qdma.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP Layerscape SoC qDMA Controller
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maintainers:
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- Frank Li <Frank.Li@nxp.com>
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properties:
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compatible:
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oneOf:
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- const: fsl,ls1021a-qdma
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- items:
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- enum:
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- fsl,ls1028a-qdma
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- fsl,ls1043a-qdma
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- fsl,ls1046a-qdma
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- const: fsl,ls1021a-qdma
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reg:
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items:
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- description: Controller regs
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- description: Status regs
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- description: Block regs
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interrupts:
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minItems: 2
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maxItems: 5
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interrupt-names:
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minItems: 2
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items:
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- const: qdma-error
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- const: qdma-queue0
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- const: qdma-queue1
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- const: qdma-queue2
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- const: qdma-queue3
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dma-channels:
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minimum: 1
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maximum: 64
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fsl,dma-queues:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Should contain number of queues supported.
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minimum: 1
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maximum: 4
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block-number:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: the virtual block number
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block-offset:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: the offset of different virtual block
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status-sizes:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: status queue size of per virtual block
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queue-sizes:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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description:
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command queue size of per virtual block, the size number
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based on queues
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big-endian:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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If present registers and hardware scatter/gather descriptors
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of the qDMA are implemented in big endian mode, otherwise in little
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mode.
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required:
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- compatible
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- reg
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- interrupts
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- interrupt-names
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- fsl,dma-queues
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- block-number
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- block-offset
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- status-sizes
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- queue-sizes
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allOf:
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- $ref: dma-controller.yaml#
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- if:
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properties:
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compatible:
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contains:
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enum:
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- fsl,ls1028a-qdma
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- fsl,ls1043a-qdma
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- fsl,ls1046a-qdma
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then:
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properties:
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interrupts:
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minItems: 5
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interrupt-names:
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minItems: 5
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else:
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properties:
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interrupts:
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maxItems: 3
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interrupt-names:
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maxItems: 3
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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dma-controller@8390000 {
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compatible = "fsl,ls1021a-qdma";
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reg = <0x8388000 0x1000>, /* Controller regs */
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<0x8389000 0x1000>, /* Status regs */
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<0x838a000 0x2000>; /* Block regs */
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interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "qdma-error", "qdma-queue0", "qdma-queue1";
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#dma-cells = <1>;
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dma-channels = <8>;
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block-number = <2>;
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block-offset = <0x1000>;
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status-sizes = <64>;
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queue-sizes = <64 64>;
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big-endian;
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fsl,dma-queues = <2>;
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};
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