555 lines
17 KiB
C
555 lines
17 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2024 Intel Corporation
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*/
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#include "i915_drv.h"
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#include "i915_reg.h"
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#include "intel_display_core.h"
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#include "intel_display_driver.h"
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#include "intel_display_types.h"
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#include "intel_lvds_regs.h"
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#include "intel_pfit.h"
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static int intel_pch_pfit_check_dst_window(const struct intel_crtc_state *crtc_state)
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{
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struct intel_display *display = to_intel_display(crtc_state);
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
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const struct drm_display_mode *adjusted_mode =
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&crtc_state->hw.adjusted_mode;
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const struct drm_rect *dst = &crtc_state->pch_pfit.dst;
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int width = drm_rect_width(dst);
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int height = drm_rect_height(dst);
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int x = dst->x1;
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int y = dst->y1;
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if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE &&
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(y & 1 || height & 1)) {
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drm_dbg_kms(display->drm,
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"[CRTC:%d:%s] pfit window (" DRM_RECT_FMT ") misaligned for interlaced output\n",
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crtc->base.base.id, crtc->base.name, DRM_RECT_ARG(dst));
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return -EINVAL;
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}
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/*
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* "Restriction : When pipe scaling is enabled, the scaled
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* output must equal the pipe active area, so Pipe active
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* size = (2 * PF window position) + PF window size."
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*
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* The vertical direction seems more forgiving than the
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* horizontal direction, but still has some issues so
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* let's follow the same hard rule for both.
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*/
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if (adjusted_mode->crtc_hdisplay != 2 * x + width ||
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adjusted_mode->crtc_vdisplay != 2 * y + height) {
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drm_dbg_kms(display->drm,
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"[CRTC:%d:%s] pfit window (" DRM_RECT_FMT ") not centered\n",
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crtc->base.base.id, crtc->base.name, DRM_RECT_ARG(dst));
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return -EINVAL;
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}
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/*
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* "Restriction : The X position must not be programmed
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* to be 1 (28:16=0 0000 0000 0001b)."
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*/
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if (x == 1) {
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drm_dbg_kms(display->drm,
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"[CRTC:%d:%s] pfit window (" DRM_RECT_FMT ") badly positioned\n",
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crtc->base.base.id, crtc->base.name, DRM_RECT_ARG(dst));
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return -EINVAL;
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}
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return 0;
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}
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static int intel_pch_pfit_check_src_size(const struct intel_crtc_state *crtc_state)
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{
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struct intel_display *display = to_intel_display(crtc_state);
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
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int pipe_src_w = drm_rect_width(&crtc_state->pipe_src);
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int pipe_src_h = drm_rect_height(&crtc_state->pipe_src);
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int max_src_w, max_src_h;
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if (DISPLAY_VER(display) >= 8) {
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max_src_w = 4096;
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max_src_h = 4096;
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} else if (DISPLAY_VER(display) >= 7) {
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/*
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* PF0 7x5 capable
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* PF1 3x3 capable (could be switched to 7x5
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* mode on HSW when PF2 unused)
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* PF2 3x3 capable
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*
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* This assumes we use a 1:1 mapping between pipe and PF.
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*/
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max_src_w = crtc->pipe == PIPE_A ? 4096 : 2048;
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max_src_h = 4096;
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} else {
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max_src_w = 4096;
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max_src_h = 4096;
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}
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if (pipe_src_w > max_src_w || pipe_src_h > max_src_h) {
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drm_dbg_kms(display->drm,
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"[CRTC:%d:%s] source size (%dx%d) exceeds pfit max (%dx%d)\n",
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crtc->base.base.id, crtc->base.name,
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pipe_src_w, pipe_src_h, max_src_w, max_src_h);
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return -EINVAL;
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}
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return 0;
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}
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static int intel_pch_pfit_check_scaling(const struct intel_crtc_state *crtc_state)
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{
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struct intel_display *display = to_intel_display(crtc_state);
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
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const struct drm_rect *dst = &crtc_state->pch_pfit.dst;
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int pipe_src_w = drm_rect_width(&crtc_state->pipe_src);
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int pipe_src_h = drm_rect_height(&crtc_state->pipe_src);
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int hscale, vscale, max_scale = 0x12000; /* 1.125 */
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struct drm_rect src;
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drm_rect_init(&src, 0, 0, pipe_src_w << 16, pipe_src_h << 16);
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hscale = drm_rect_calc_hscale(&src, dst, 0, max_scale);
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if (hscale < 0) {
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drm_dbg_kms(display->drm,
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"[CRTC:%d:%s] pfit horizontal downscaling (%d->%d) exceeds max (0x%x)\n",
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crtc->base.base.id, crtc->base.name,
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pipe_src_w, drm_rect_width(dst),
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max_scale);
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return hscale;
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}
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vscale = drm_rect_calc_vscale(&src, dst, 0, max_scale);
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if (vscale < 0) {
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drm_dbg_kms(display->drm,
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"[CRTC:%d:%s] pfit vertical downscaling (%d->%d) exceeds max (0x%x)\n",
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crtc->base.base.id, crtc->base.name,
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pipe_src_h, drm_rect_height(dst),
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max_scale);
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return vscale;
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}
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return 0;
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}
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static int intel_pch_pfit_check_timings(const struct intel_crtc_state *crtc_state)
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{
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struct intel_display *display = to_intel_display(crtc_state);
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
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const struct drm_display_mode *adjusted_mode =
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&crtc_state->hw.adjusted_mode;
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if (adjusted_mode->crtc_vdisplay < 7) {
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drm_dbg_kms(display->drm,
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"[CRTC:%d:%s] vertical active (%d) below minimum (%d) for pfit\n",
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crtc->base.base.id, crtc->base.name,
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adjusted_mode->crtc_vdisplay, 7);
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return -EINVAL;
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}
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return 0;
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}
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static int intel_pch_pfit_check_cloning(const struct intel_crtc_state *crtc_state)
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{
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struct intel_display *display = to_intel_display(crtc_state);
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
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/*
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* The panel fitter is in the pipe and thus would affect every
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* cloned output. The relevant properties (scaling mode, TV
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* margins) are per-connector so we'd have to make sure each
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* output sets them up identically. Seems like a very niche use
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* case so let's just reject cloning entirely when pfit is used.
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*/
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if (crtc_state->uapi.encoder_mask &&
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!is_power_of_2(crtc_state->uapi.encoder_mask)) {
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drm_dbg_kms(display->drm,
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"[CRTC:%d:%s] no pfit when cloning\n",
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crtc->base.base.id, crtc->base.name);
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return -EINVAL;
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}
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return 0;
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}
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/* adjusted_mode has been preset to be the panel's fixed mode */
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static int pch_panel_fitting(struct intel_crtc_state *crtc_state,
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const struct drm_connector_state *conn_state)
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{
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struct intel_display *display = to_intel_display(crtc_state);
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const struct drm_display_mode *adjusted_mode =
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&crtc_state->hw.adjusted_mode;
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int pipe_src_w = drm_rect_width(&crtc_state->pipe_src);
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int pipe_src_h = drm_rect_height(&crtc_state->pipe_src);
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int ret, x, y, width, height;
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/* Native modes don't need fitting */
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if (adjusted_mode->crtc_hdisplay == pipe_src_w &&
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adjusted_mode->crtc_vdisplay == pipe_src_h &&
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crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
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return 0;
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switch (conn_state->scaling_mode) {
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case DRM_MODE_SCALE_CENTER:
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width = pipe_src_w;
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height = pipe_src_h;
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x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
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y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
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break;
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case DRM_MODE_SCALE_ASPECT:
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/* Scale but preserve the aspect ratio */
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{
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u32 scaled_width = adjusted_mode->crtc_hdisplay * pipe_src_h;
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u32 scaled_height = pipe_src_w * adjusted_mode->crtc_vdisplay;
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if (scaled_width > scaled_height) { /* pillar */
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width = scaled_height / pipe_src_h;
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if (width & 1)
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width++;
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x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
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y = 0;
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height = adjusted_mode->crtc_vdisplay;
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} else if (scaled_width < scaled_height) { /* letter */
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height = scaled_width / pipe_src_w;
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if (height & 1)
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height++;
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y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
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x = 0;
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width = adjusted_mode->crtc_hdisplay;
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} else {
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x = y = 0;
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width = adjusted_mode->crtc_hdisplay;
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height = adjusted_mode->crtc_vdisplay;
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}
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}
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break;
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case DRM_MODE_SCALE_NONE:
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WARN_ON(adjusted_mode->crtc_hdisplay != pipe_src_w);
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WARN_ON(adjusted_mode->crtc_vdisplay != pipe_src_h);
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fallthrough;
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case DRM_MODE_SCALE_FULLSCREEN:
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x = y = 0;
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width = adjusted_mode->crtc_hdisplay;
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height = adjusted_mode->crtc_vdisplay;
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break;
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default:
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MISSING_CASE(conn_state->scaling_mode);
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return -EINVAL;
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}
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drm_rect_init(&crtc_state->pch_pfit.dst,
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x, y, width, height);
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crtc_state->pch_pfit.enabled = true;
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/*
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* SKL+ have unified scalers for pipes/planes so the
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* checks are done in a single place for all scalers.
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*/
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if (DISPLAY_VER(display) >= 9)
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return 0;
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ret = intel_pch_pfit_check_dst_window(crtc_state);
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if (ret)
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return ret;
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ret = intel_pch_pfit_check_src_size(crtc_state);
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if (ret)
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return ret;
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ret = intel_pch_pfit_check_scaling(crtc_state);
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if (ret)
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return ret;
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ret = intel_pch_pfit_check_timings(crtc_state);
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if (ret)
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return ret;
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ret = intel_pch_pfit_check_cloning(crtc_state);
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if (ret)
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return ret;
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return 0;
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}
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static void
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centre_horizontally(struct drm_display_mode *adjusted_mode,
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int width)
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{
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u32 border, sync_pos, blank_width, sync_width;
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/* keep the hsync and hblank widths constant */
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sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
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blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
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sync_pos = (blank_width - sync_width + 1) / 2;
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border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
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border += border & 1; /* make the border even */
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adjusted_mode->crtc_hdisplay = width;
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adjusted_mode->crtc_hblank_start = width + border;
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adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
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adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
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adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
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}
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static void
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centre_vertically(struct drm_display_mode *adjusted_mode,
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int height)
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{
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u32 border, sync_pos, blank_width, sync_width;
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/* keep the vsync and vblank widths constant */
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sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
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blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
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sync_pos = (blank_width - sync_width + 1) / 2;
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border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
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adjusted_mode->crtc_vdisplay = height;
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adjusted_mode->crtc_vblank_start = height + border;
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adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
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adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
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adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
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}
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static u32 panel_fitter_scaling(u32 source, u32 target)
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{
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/*
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* Floating point operation is not supported. So the FACTOR
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* is defined, which can avoid the floating point computation
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* when calculating the panel ratio.
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*/
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#define ACCURACY 12
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#define FACTOR (1 << ACCURACY)
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u32 ratio = source * FACTOR / target;
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return (FACTOR * ratio + FACTOR/2) / FACTOR;
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}
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static void i965_scale_aspect(struct intel_crtc_state *crtc_state,
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u32 *pfit_control)
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{
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const struct drm_display_mode *adjusted_mode =
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&crtc_state->hw.adjusted_mode;
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int pipe_src_w = drm_rect_width(&crtc_state->pipe_src);
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int pipe_src_h = drm_rect_height(&crtc_state->pipe_src);
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u32 scaled_width = adjusted_mode->crtc_hdisplay * pipe_src_h;
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u32 scaled_height = pipe_src_w * adjusted_mode->crtc_vdisplay;
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/* 965+ is easy, it does everything in hw */
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if (scaled_width > scaled_height)
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*pfit_control |= PFIT_ENABLE |
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PFIT_SCALING_PILLAR;
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else if (scaled_width < scaled_height)
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*pfit_control |= PFIT_ENABLE |
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PFIT_SCALING_LETTER;
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else if (adjusted_mode->crtc_hdisplay != pipe_src_w)
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*pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
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}
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static void i9xx_scale_aspect(struct intel_crtc_state *crtc_state,
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u32 *pfit_control, u32 *pfit_pgm_ratios,
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u32 *border)
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{
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struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
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int pipe_src_w = drm_rect_width(&crtc_state->pipe_src);
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int pipe_src_h = drm_rect_height(&crtc_state->pipe_src);
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u32 scaled_width = adjusted_mode->crtc_hdisplay * pipe_src_h;
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u32 scaled_height = pipe_src_w * adjusted_mode->crtc_vdisplay;
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u32 bits;
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/*
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* For earlier chips we have to calculate the scaling
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* ratio by hand and program it into the
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* PFIT_PGM_RATIO register
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*/
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if (scaled_width > scaled_height) { /* pillar */
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centre_horizontally(adjusted_mode,
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scaled_height / pipe_src_h);
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*border = LVDS_BORDER_ENABLE;
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if (pipe_src_h != adjusted_mode->crtc_vdisplay) {
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bits = panel_fitter_scaling(pipe_src_h,
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adjusted_mode->crtc_vdisplay);
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*pfit_pgm_ratios |= (PFIT_HORIZ_SCALE(bits) |
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PFIT_VERT_SCALE(bits));
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*pfit_control |= (PFIT_ENABLE |
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PFIT_VERT_INTERP_BILINEAR |
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PFIT_HORIZ_INTERP_BILINEAR);
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}
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} else if (scaled_width < scaled_height) { /* letter */
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centre_vertically(adjusted_mode,
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scaled_width / pipe_src_w);
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*border = LVDS_BORDER_ENABLE;
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if (pipe_src_w != adjusted_mode->crtc_hdisplay) {
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bits = panel_fitter_scaling(pipe_src_w,
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adjusted_mode->crtc_hdisplay);
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*pfit_pgm_ratios |= (PFIT_HORIZ_SCALE(bits) |
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PFIT_VERT_SCALE(bits));
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*pfit_control |= (PFIT_ENABLE |
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PFIT_VERT_INTERP_BILINEAR |
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PFIT_HORIZ_INTERP_BILINEAR);
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}
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} else {
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/* Aspects match, Let hw scale both directions */
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*pfit_control |= (PFIT_ENABLE |
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PFIT_VERT_AUTO_SCALE |
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PFIT_HORIZ_AUTO_SCALE |
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PFIT_VERT_INTERP_BILINEAR |
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PFIT_HORIZ_INTERP_BILINEAR);
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}
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}
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static int intel_gmch_pfit_check_timings(const struct intel_crtc_state *crtc_state)
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{
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struct intel_display *display = to_intel_display(crtc_state);
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
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const struct drm_display_mode *adjusted_mode =
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&crtc_state->hw.adjusted_mode;
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int min;
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if (DISPLAY_VER(display) >= 4)
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min = 3;
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else
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min = 2;
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if (adjusted_mode->crtc_hdisplay < min) {
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drm_dbg_kms(display->drm,
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"[CRTC:%d:%s] horizontal active (%d) below minimum (%d) for pfit\n",
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crtc->base.base.id, crtc->base.name,
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adjusted_mode->crtc_hdisplay, min);
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return -EINVAL;
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}
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if (adjusted_mode->crtc_vdisplay < min) {
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drm_dbg_kms(display->drm,
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"[CRTC:%d:%s] vertical active (%d) below minimum (%d) for pfit\n",
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crtc->base.base.id, crtc->base.name,
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adjusted_mode->crtc_vdisplay, min);
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return -EINVAL;
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}
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return 0;
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}
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static int gmch_panel_fitting(struct intel_crtc_state *crtc_state,
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const struct drm_connector_state *conn_state)
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{
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struct intel_display *display = to_intel_display(crtc_state);
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
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u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
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struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
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|
int pipe_src_w = drm_rect_width(&crtc_state->pipe_src);
|
|
int pipe_src_h = drm_rect_height(&crtc_state->pipe_src);
|
|
|
|
/* Native modes don't need fitting */
|
|
if (adjusted_mode->crtc_hdisplay == pipe_src_w &&
|
|
adjusted_mode->crtc_vdisplay == pipe_src_h)
|
|
goto out;
|
|
|
|
/*
|
|
* TODO: implement downscaling for i965+. Need to account
|
|
* for downscaling in intel_crtc_compute_pixel_rate().
|
|
*/
|
|
if (adjusted_mode->crtc_hdisplay < pipe_src_w) {
|
|
drm_dbg_kms(display->drm,
|
|
"[CRTC:%d:%s] pfit horizontal downscaling (%d->%d) not supported\n",
|
|
crtc->base.base.id, crtc->base.name,
|
|
pipe_src_w, adjusted_mode->crtc_hdisplay);
|
|
return -EINVAL;
|
|
}
|
|
if (adjusted_mode->crtc_vdisplay < pipe_src_h) {
|
|
drm_dbg_kms(display->drm,
|
|
"[CRTC:%d:%s] pfit vertical downscaling (%d->%d) not supported\n",
|
|
crtc->base.base.id, crtc->base.name,
|
|
pipe_src_h, adjusted_mode->crtc_vdisplay);
|
|
return -EINVAL;
|
|
}
|
|
|
|
switch (conn_state->scaling_mode) {
|
|
case DRM_MODE_SCALE_CENTER:
|
|
/*
|
|
* For centered modes, we have to calculate border widths &
|
|
* heights and modify the values programmed into the CRTC.
|
|
*/
|
|
centre_horizontally(adjusted_mode, pipe_src_w);
|
|
centre_vertically(adjusted_mode, pipe_src_h);
|
|
border = LVDS_BORDER_ENABLE;
|
|
break;
|
|
case DRM_MODE_SCALE_ASPECT:
|
|
/* Scale but preserve the aspect ratio */
|
|
if (DISPLAY_VER(display) >= 4)
|
|
i965_scale_aspect(crtc_state, &pfit_control);
|
|
else
|
|
i9xx_scale_aspect(crtc_state, &pfit_control,
|
|
&pfit_pgm_ratios, &border);
|
|
break;
|
|
case DRM_MODE_SCALE_FULLSCREEN:
|
|
/*
|
|
* Full scaling, even if it changes the aspect ratio.
|
|
* Fortunately this is all done for us in hw.
|
|
*/
|
|
if (pipe_src_h != adjusted_mode->crtc_vdisplay ||
|
|
pipe_src_w != adjusted_mode->crtc_hdisplay) {
|
|
pfit_control |= PFIT_ENABLE;
|
|
if (DISPLAY_VER(display) >= 4)
|
|
pfit_control |= PFIT_SCALING_AUTO;
|
|
else
|
|
pfit_control |= (PFIT_VERT_AUTO_SCALE |
|
|
PFIT_VERT_INTERP_BILINEAR |
|
|
PFIT_HORIZ_AUTO_SCALE |
|
|
PFIT_HORIZ_INTERP_BILINEAR);
|
|
}
|
|
break;
|
|
default:
|
|
MISSING_CASE(conn_state->scaling_mode);
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* 965+ wants fuzzy fitting */
|
|
/* FIXME: handle multiple panels by failing gracefully */
|
|
if (DISPLAY_VER(display) >= 4)
|
|
pfit_control |= PFIT_PIPE(crtc->pipe) | PFIT_FILTER_FUZZY;
|
|
|
|
out:
|
|
if ((pfit_control & PFIT_ENABLE) == 0) {
|
|
pfit_control = 0;
|
|
pfit_pgm_ratios = 0;
|
|
}
|
|
|
|
/* Make sure pre-965 set dither correctly for 18bpp panels. */
|
|
if (DISPLAY_VER(display) < 4 && crtc_state->pipe_bpp == 18)
|
|
pfit_control |= PFIT_PANEL_8TO6_DITHER_ENABLE;
|
|
|
|
crtc_state->gmch_pfit.control = pfit_control;
|
|
crtc_state->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
|
|
crtc_state->gmch_pfit.lvds_border_bits = border;
|
|
|
|
if ((pfit_control & PFIT_ENABLE) == 0)
|
|
return 0;
|
|
|
|
return intel_gmch_pfit_check_timings(crtc_state);
|
|
}
|
|
|
|
int intel_panel_fitting(struct intel_crtc_state *crtc_state,
|
|
const struct drm_connector_state *conn_state)
|
|
{
|
|
struct intel_display *display = to_intel_display(crtc_state);
|
|
|
|
if (HAS_GMCH(display))
|
|
return gmch_panel_fitting(crtc_state, conn_state);
|
|
else
|
|
return pch_panel_fitting(crtc_state, conn_state);
|
|
}
|