122 lines
4.1 KiB
C
122 lines
4.1 KiB
C
/*
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* Copyright 2023 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef __CLEARSTATE_GFX12_H_
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#define __CLEARSTATE_GFX12_H_
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static const unsigned int gfx12_SECT_CONTEXT_def_1[] = {
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0x00000000, //mmSC_MEM_TEMPORAL
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0x00000000, //mmSC_MEM_SPEC_READ
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0x00000000, //mmPA_SC_VPORT_0_TL
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0x00000000, //mmPA_SC_VPORT_0_BR
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0x00000000, //mmPA_SC_VPORT_1_TL
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0x00000000, //mmPA_SC_VPORT_1_BR
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0x00000000, //mmPA_SC_VPORT_2_TL
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0x00000000, //mmPA_SC_VPORT_2_BR
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0x00000000, //mmPA_SC_VPORT_3_TL
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0x00000000, //mmPA_SC_VPORT_3_BR
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0x00000000, //mmPA_SC_VPORT_4_TL
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0x00000000, //mmPA_SC_VPORT_4_BR
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0x00000000, //mmPA_SC_VPORT_5_TL
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0x00000000, //mmPA_SC_VPORT_5_BR
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0x00000000, //mmPA_SC_VPORT_6_TL
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0x00000000, //mmPA_SC_VPORT_6_BR
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0x00000000, //mmPA_SC_VPORT_7_TL
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0x00000000, //mmPA_SC_VPORT_7_BR
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0x00000000, //mmPA_SC_VPORT_8_TL
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0x00000000, //mmPA_SC_VPORT_8_BR
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0x00000000, //mmPA_SC_VPORT_9_TL
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0x00000000, //mmPA_SC_VPORT_9_BR
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0x00000000, //mmPA_SC_VPORT_10_TL
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0x00000000, //mmPA_SC_VPORT_10_BR
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0x00000000, //mmPA_SC_VPORT_11_TL
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0x00000000, //mmPA_SC_VPORT_11_BR
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0x00000000, //mmPA_SC_VPORT_12_TL
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0x00000000, //mmPA_SC_VPORT_12_BR
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0x00000000, //mmPA_SC_VPORT_13_TL
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0x00000000, //mmPA_SC_VPORT_13_BR
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0x00000000, //mmPA_SC_VPORT_14_TL
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0x00000000, //mmPA_SC_VPORT_14_BR
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0x00000000, //mmPA_SC_VPORT_15_TL
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0x00000000, //mmPA_SC_VPORT_15_BR
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};
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static const unsigned int gfx12_SECT_CONTEXT_def_2[] = {
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0x00000000, //mmPA_CL_PROG_NEAR_CLIP_Z
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0x00000000, //mmPA_RATE_CNTL
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};
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static const unsigned int gfx12_SECT_CONTEXT_def_3[] = {
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0x00000000, //mmCP_PERFMON_CNTX_CNTL
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};
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static const unsigned int gfx12_SECT_CONTEXT_def_4[] = {
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0x00000000, //mmCONTEXT_RESERVED_REG0
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0x00000000, //mmCONTEXT_RESERVED_REG1
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0x00000000, //mmPA_SC_CLIPRECT_0_EXT
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0x00000000, //mmPA_SC_CLIPRECT_1_EXT
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0x00000000, //mmPA_SC_CLIPRECT_2_EXT
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0x00000000, //mmPA_SC_CLIPRECT_3_EXT
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};
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static const unsigned int gfx12_SECT_CONTEXT_def_5[] = {
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0x00000000, //mmPA_SC_HIZ_INFO
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0x00000000, //mmPA_SC_HIS_INFO
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0x00000000, //mmPA_SC_HIZ_BASE
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0x00000000, //mmPA_SC_HIZ_BASE_EXT
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0x00000000, //mmPA_SC_HIZ_SIZE_XY
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0x00000000, //mmPA_SC_HIS_BASE
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0x00000000, //mmPA_SC_HIS_BASE_EXT
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0x00000000, //mmPA_SC_HIS_SIZE_XY
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0x00000000, //mmPA_SC_BINNER_OUTPUT_TIMEOUT_CNTL
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0x00000000, //mmPA_SC_BINNER_DYNAMIC_BATCH_LIMIT
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0x00000000, //mmPA_SC_HISZ_CONTROL
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};
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static const unsigned int gfx12_SECT_CONTEXT_def_6[] = {
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0x00000000, //mmCB_MEM0_INFO
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0x00000000, //mmCB_MEM1_INFO
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0x00000000, //mmCB_MEM2_INFO
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0x00000000, //mmCB_MEM3_INFO
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0x00000000, //mmCB_MEM4_INFO
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0x00000000, //mmCB_MEM5_INFO
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0x00000000, //mmCB_MEM6_INFO
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0x00000000, //mmCB_MEM7_INFO
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};
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static const struct cs_extent_def gfx12_SECT_CONTEXT_defs[] = {
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{gfx12_SECT_CONTEXT_def_1, 0x0000a03e, 34 },
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{gfx12_SECT_CONTEXT_def_2, 0x0000a0cc, 2 },
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{gfx12_SECT_CONTEXT_def_3, 0x0000a0d8, 1 },
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{gfx12_SECT_CONTEXT_def_4, 0x0000a0db, 6 },
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{gfx12_SECT_CONTEXT_def_5, 0x0000a2e5, 11 },
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{gfx12_SECT_CONTEXT_def_6, 0x0000a3c0, 8 },
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{ 0, 0, 0 }
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};
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static const struct cs_section_def gfx12_cs_data[] = {
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{ gfx12_SECT_CONTEXT_defs, SECT_CONTEXT },
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{ 0, SECT_NONE }
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};
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#endif /* __CLEARSTATE_GFX12_H_ */
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