80 lines
1.9 KiB
YAML
80 lines
1.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright (c) 2023 MediaTek, BayLibre
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/mediatek,mt8365-csi-rx.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Mediatek Sensor Interface MIPI CSI CD-PHY
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maintainers:
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- Julien Stephan <jstephan@baylibre.com>
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- Andy Hsieh <andy.hsieh@mediatek.com>
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description:
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The SENINF CD-PHY is a set of CD-PHY connected to the SENINF CSI-2
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receivers. The number of PHYs depends on the SoC model.
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Depending on the SoC model, each PHYs can be either CD-PHY or D-PHY only
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capable.
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properties:
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compatible:
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enum:
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- mediatek,mt8365-csi-rx
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reg:
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maxItems: 1
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num-lanes:
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enum: [2, 3, 4]
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'#phy-cells':
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enum: [0, 1]
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description: |
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If the PHY doesn't support mode selection then #phy-cells must be 0 and
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PHY mode is described using phy-type property.
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If the PHY supports mode selection, then #phy-cells must be 1 and mode
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is set in the PHY cells. Supported modes are:
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- PHY_TYPE_DPHY
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- PHY_TYPE_CPHY
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See include/dt-bindings/phy/phy.h for constants.
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phy-type:
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description:
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If the PHY doesn't support mode selection then this set the operating mode.
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See include/dt-bindings/phy/phy.h for constants.
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const: 10
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$ref: /schemas/types.yaml#/definitions/uint32
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required:
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- compatible
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- reg
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- num-lanes
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- '#phy-cells'
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/phy/phy.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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csi0_rx: phy@11c10000 {
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compatible = "mediatek,mt8365-csi-rx";
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reg = <0 0x11c10000 0 0x2000>;
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num-lanes = <2>;
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#phy-cells = <1>;
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};
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csi1_rx: phy@11c12000 {
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compatible = "mediatek,mt8365-csi-rx";
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reg = <0 0x11c12000 0 0x2000>;
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phy-type = <PHY_TYPE_DPHY>;
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num-lanes = <2>;
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#phy-cells = <0>;
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};
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};
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...
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