360 lines
9.1 KiB
C
360 lines
9.1 KiB
C
/*
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* Copyright 2023 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "priv.h"
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#include <subdev/bios.h>
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#include <subdev/bios/pmu.h>
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#include <nvfw/fw.h>
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union nvfw_falcon_appif_hdr {
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struct nvfw_falcon_appif_hdr_v1 {
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u8 ver;
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u8 hdr;
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u8 len;
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u8 cnt;
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} v1;
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};
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union nvfw_falcon_appif {
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struct nvfw_falcon_appif_v1 {
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#define NVFW_FALCON_APPIF_ID_DMEMMAPPER 0x00000004
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u32 id;
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u32 dmem_base;
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} v1;
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};
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union nvfw_falcon_appif_dmemmapper {
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struct {
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u32 signature;
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u16 version;
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u16 size;
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u32 cmd_in_buffer_offset;
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u32 cmd_in_buffer_size;
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u32 cmd_out_buffer_offset;
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u32 cmd_out_buffer_size;
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u32 nvf_img_data_buffer_offset;
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u32 nvf_img_data_buffer_size;
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u32 printf_buffer_hdr;
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u32 ucode_build_time_stamp;
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u32 ucode_signature;
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#define NVFW_FALCON_APPIF_DMEMMAPPER_CMD_FRTS 0x00000015
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#define NVFW_FALCON_APPIF_DMEMMAPPER_CMD_SB 0x00000019
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u32 init_cmd;
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u32 ucode_feature;
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u32 ucode_cmd_mask0;
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u32 ucode_cmd_mask1;
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u32 multi_tgt_tbl;
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} v3;
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};
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struct nvfw_fwsec_frts_cmd {
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struct {
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u32 ver;
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u32 hdr;
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u64 addr;
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u32 size;
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u32 flags;
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} read_vbios;
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struct {
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u32 ver;
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u32 hdr;
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u32 addr;
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u32 size;
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#define NVFW_FRTS_CMD_REGION_TYPE_FB 0x00000002
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u32 type;
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} frts_region;
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};
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static int
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nvkm_gsp_fwsec_patch(struct nvkm_gsp *gsp, struct nvkm_falcon_fw *fw, u32 if_offset, u32 init_cmd)
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{
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union nvfw_falcon_appif_hdr *hdr = (void *)(fw->fw.img + fw->dmem_base_img + if_offset);
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const u8 *dmem = fw->fw.img + fw->dmem_base_img;
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int i;
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if (WARN_ON(hdr->v1.ver != 1))
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return -EINVAL;
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for (i = 0; i < hdr->v1.cnt; i++) {
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union nvfw_falcon_appif *app = (void *)((u8 *)hdr + hdr->v1.hdr + i * hdr->v1.len);
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union nvfw_falcon_appif_dmemmapper *dmemmap;
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struct nvfw_fwsec_frts_cmd *frtscmd;
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if (app->v1.id != NVFW_FALCON_APPIF_ID_DMEMMAPPER)
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continue;
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dmemmap = (void *)(dmem + app->v1.dmem_base);
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dmemmap->v3.init_cmd = init_cmd;
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frtscmd = (void *)(dmem + dmemmap->v3.cmd_in_buffer_offset);
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frtscmd->read_vbios.ver = 1;
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frtscmd->read_vbios.hdr = sizeof(frtscmd->read_vbios);
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frtscmd->read_vbios.addr = 0;
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frtscmd->read_vbios.size = 0;
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frtscmd->read_vbios.flags = 2;
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if (init_cmd == NVFW_FALCON_APPIF_DMEMMAPPER_CMD_FRTS) {
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frtscmd->frts_region.ver = 1;
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frtscmd->frts_region.hdr = sizeof(frtscmd->frts_region);
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frtscmd->frts_region.addr = gsp->fb.wpr2.frts.addr >> 12;
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frtscmd->frts_region.size = gsp->fb.wpr2.frts.size >> 12;
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frtscmd->frts_region.type = NVFW_FRTS_CMD_REGION_TYPE_FB;
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}
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break;
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}
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if (WARN_ON(i == hdr->v1.cnt))
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return -EINVAL;
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return 0;
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}
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union nvfw_falcon_ucode_desc {
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struct nvkm_falcon_ucode_desc_v2 {
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u32 Hdr;
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u32 StoredSize;
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u32 UncompressedSize;
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u32 VirtualEntry;
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u32 InterfaceOffset;
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u32 IMEMPhysBase;
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u32 IMEMLoadSize;
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u32 IMEMVirtBase;
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u32 IMEMSecBase;
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u32 IMEMSecSize;
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u32 DMEMOffset;
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u32 DMEMPhysBase;
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u32 DMEMLoadSize;
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u32 altIMEMLoadSize;
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u32 altDMEMLoadSize;
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} v2;
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struct nvkm_falcon_ucode_desc_v3 {
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u32 Hdr;
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u32 StoredSize;
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u32 PKCDataOffset;
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u32 InterfaceOffset;
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u32 IMEMPhysBase;
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u32 IMEMLoadSize;
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u32 IMEMVirtBase;
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u32 DMEMPhysBase;
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u32 DMEMLoadSize;
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u16 EngineIdMask;
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u8 UcodeId;
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u8 SignatureCount;
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u16 SignatureVersions;
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u16 Reserved;
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} v3;
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};
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static int
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nvkm_gsp_fwsec_v2(struct nvkm_gsp *gsp, const char *name,
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const struct nvkm_falcon_ucode_desc_v2 *desc, u32 size, u32 init_cmd,
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struct nvkm_falcon_fw *fw)
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{
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struct nvkm_subdev *subdev = &gsp->subdev;
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const struct firmware *bl;
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const struct nvfw_bin_hdr *hdr;
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const struct nvfw_bl_desc *bld;
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int ret;
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/* Build ucode. */
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ret = nvkm_falcon_fw_ctor(gsp->func->fwsec, name, subdev->device, true,
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(u8 *)desc + size, desc->IMEMLoadSize + desc->DMEMLoadSize,
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&gsp->falcon, fw);
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if (WARN_ON(ret))
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return ret;
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fw->nmem_base_img = 0;
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fw->nmem_base = desc->IMEMPhysBase;
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fw->nmem_size = desc->IMEMLoadSize - desc->IMEMSecSize;
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fw->imem_base_img = 0;
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fw->imem_base = desc->IMEMSecBase;
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fw->imem_size = desc->IMEMSecSize;
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fw->dmem_base_img = desc->DMEMOffset;
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fw->dmem_base = desc->DMEMPhysBase;
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fw->dmem_size = desc->DMEMLoadSize;
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/* Bootloader. */
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ret = nvkm_firmware_get(subdev, "acr/bl", 0, &bl);
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if (ret)
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return ret;
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hdr = nvfw_bin_hdr(subdev, bl->data);
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bld = nvfw_bl_desc(subdev, bl->data + hdr->header_offset);
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fw->boot_addr = bld->start_tag << 8;
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fw->boot_size = bld->code_size;
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fw->boot = kmemdup(bl->data + hdr->data_offset + bld->code_off, fw->boot_size, GFP_KERNEL);
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if (!fw->boot)
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ret = -ENOMEM;
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nvkm_firmware_put(bl);
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/* Patch in interface data. */
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return nvkm_gsp_fwsec_patch(gsp, fw, desc->InterfaceOffset, init_cmd);
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}
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static int
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nvkm_gsp_fwsec_v3(struct nvkm_gsp *gsp, const char *name,
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const struct nvkm_falcon_ucode_desc_v3 *desc, u32 size, u32 init_cmd,
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struct nvkm_falcon_fw *fw)
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{
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struct nvkm_device *device = gsp->subdev.device;
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struct nvkm_bios *bios = device->bios;
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int ret;
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/* Build ucode. */
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ret = nvkm_falcon_fw_ctor(gsp->func->fwsec, name, device, true,
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(u8 *)desc + size, desc->IMEMLoadSize + desc->DMEMLoadSize,
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&gsp->falcon, fw);
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if (WARN_ON(ret))
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return ret;
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fw->imem_base_img = 0;
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fw->imem_base = desc->IMEMPhysBase;
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fw->imem_size = desc->IMEMLoadSize;
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fw->dmem_base_img = desc->IMEMLoadSize;
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fw->dmem_base = desc->DMEMPhysBase;
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fw->dmem_size = ALIGN(desc->DMEMLoadSize, 256);
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fw->dmem_sign = desc->PKCDataOffset;
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fw->boot_addr = 0;
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fw->fuse_ver = desc->SignatureVersions;
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fw->ucode_id = desc->UcodeId;
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fw->engine_id = desc->EngineIdMask;
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/* Patch in signature. */
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ret = nvkm_falcon_fw_sign(fw, fw->dmem_base_img + desc->PKCDataOffset, 96 * 4,
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nvbios_pointer(bios, 0), desc->SignatureCount,
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(u8 *)desc + 0x2c - (u8 *)nvbios_pointer(bios, 0), 0, 0);
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if (WARN_ON(ret))
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return ret;
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/* Patch in interface data. */
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return nvkm_gsp_fwsec_patch(gsp, fw, desc->InterfaceOffset, init_cmd);
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}
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static int
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nvkm_gsp_fwsec(struct nvkm_gsp *gsp, const char *name, u32 init_cmd)
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{
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struct nvkm_subdev *subdev = &gsp->subdev;
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struct nvkm_device *device = subdev->device;
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struct nvkm_bios *bios = device->bios;
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const union nvfw_falcon_ucode_desc *desc;
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struct nvbios_pmuE flcn_ucode;
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u8 idx, ver, hdr;
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u32 data;
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u16 size, vers;
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struct nvkm_falcon_fw fw = {};
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u32 mbox0 = 0;
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int ret;
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/* Lookup in VBIOS. */
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for (idx = 0; (data = nvbios_pmuEp(bios, idx, &ver, &hdr, &flcn_ucode)); idx++) {
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if (flcn_ucode.type == 0x85)
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break;
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}
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if (WARN_ON(!data))
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return -EINVAL;
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/* Deteremine version. */
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desc = nvbios_pointer(bios, flcn_ucode.data);
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if (WARN_ON(!(desc->v2.Hdr & 0x00000001)))
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return -EINVAL;
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size = (desc->v2.Hdr & 0xffff0000) >> 16;
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vers = (desc->v2.Hdr & 0x0000ff00) >> 8;
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switch (vers) {
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case 2: ret = nvkm_gsp_fwsec_v2(gsp, name, &desc->v2, size, init_cmd, &fw); break;
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case 3: ret = nvkm_gsp_fwsec_v3(gsp, name, &desc->v3, size, init_cmd, &fw); break;
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default:
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nvkm_error(subdev, "%s(v%d): version unknown\n", name, vers);
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return -EINVAL;
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}
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if (ret) {
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nvkm_error(subdev, "%s(v%d): %d\n", name, vers, ret);
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return ret;
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}
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/* Boot. */
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ret = nvkm_falcon_fw_boot(&fw, subdev, true, &mbox0, NULL, 0, 0);
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nvkm_falcon_fw_dtor(&fw);
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if (ret)
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return ret;
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return 0;
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}
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int
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nvkm_gsp_fwsec_sb(struct nvkm_gsp *gsp)
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{
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struct nvkm_subdev *subdev = &gsp->subdev;
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struct nvkm_device *device = subdev->device;
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int ret;
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u32 err;
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ret = nvkm_gsp_fwsec(gsp, "fwsec-sb", NVFW_FALCON_APPIF_DMEMMAPPER_CMD_SB);
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if (ret)
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return ret;
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/* Verify. */
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err = nvkm_rd32(device, 0x001400 + (0x15 * 4)) & 0x0000ffff;
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if (err) {
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nvkm_error(subdev, "fwsec-sb: 0x%04x\n", err);
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return -EIO;
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}
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return 0;
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}
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int
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nvkm_gsp_fwsec_frts(struct nvkm_gsp *gsp)
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{
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struct nvkm_subdev *subdev = &gsp->subdev;
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struct nvkm_device *device = subdev->device;
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int ret;
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u32 err, wpr2_lo, wpr2_hi;
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ret = nvkm_gsp_fwsec(gsp, "fwsec-frts", NVFW_FALCON_APPIF_DMEMMAPPER_CMD_FRTS);
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if (ret)
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return ret;
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/* Verify. */
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err = nvkm_rd32(device, 0x001400 + (0xe * 4)) >> 16;
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if (err) {
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nvkm_error(subdev, "fwsec-frts: 0x%04x\n", err);
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return -EIO;
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}
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wpr2_lo = nvkm_rd32(device, 0x1fa824);
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wpr2_hi = nvkm_rd32(device, 0x1fa828);
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nvkm_debug(subdev, "fwsec-frts: WPR2 @ %08x - %08x\n", wpr2_lo, wpr2_hi);
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return 0;
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}
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