467 lines
11 KiB
C
467 lines
11 KiB
C
/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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*/
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/*
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* Authors: Dave Airlie <airlied@redhat.com>
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*/
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#ifndef __AST_DRV_H__
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#define __AST_DRV_H__
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#include <linux/io.h>
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#include <linux/types.h>
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#include <drm/drm_connector.h>
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#include <drm/drm_crtc.h>
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#include <drm/drm_encoder.h>
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#include <drm/drm_mode.h>
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#include <drm/drm_framebuffer.h>
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#include "ast_reg.h"
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#define DRIVER_AUTHOR "Dave Airlie"
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#define DRIVER_NAME "ast"
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#define DRIVER_DESC "AST"
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#define DRIVER_DATE "20120228"
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#define DRIVER_MAJOR 0
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#define DRIVER_MINOR 1
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#define DRIVER_PATCHLEVEL 0
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#define PCI_CHIP_AST2000 0x2000
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#define PCI_CHIP_AST2100 0x2010
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#define __AST_CHIP(__gen, __index) ((__gen) << 16 | (__index))
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enum ast_chip {
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/* 1st gen */
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AST1000 = __AST_CHIP(1, 0), // unused
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AST2000 = __AST_CHIP(1, 1),
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/* 2nd gen */
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AST1100 = __AST_CHIP(2, 0),
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AST2100 = __AST_CHIP(2, 1),
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AST2050 = __AST_CHIP(2, 2), // unused
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/* 3rd gen */
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AST2200 = __AST_CHIP(3, 0),
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AST2150 = __AST_CHIP(3, 1),
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/* 4th gen */
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AST2300 = __AST_CHIP(4, 0),
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AST1300 = __AST_CHIP(4, 1),
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AST1050 = __AST_CHIP(4, 2), // unused
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/* 5th gen */
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AST2400 = __AST_CHIP(5, 0),
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AST1400 = __AST_CHIP(5, 1),
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AST1250 = __AST_CHIP(5, 2), // unused
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/* 6th gen */
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AST2500 = __AST_CHIP(6, 0),
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AST2510 = __AST_CHIP(6, 1),
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AST2520 = __AST_CHIP(6, 2), // unused
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/* 7th gen */
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AST2600 = __AST_CHIP(7, 0),
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AST2620 = __AST_CHIP(7, 1), // unused
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};
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#define __AST_CHIP_GEN(__chip) (((unsigned long)(__chip)) >> 16)
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enum ast_tx_chip {
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AST_TX_NONE,
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AST_TX_SIL164,
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AST_TX_DP501,
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AST_TX_ASTDP,
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};
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enum ast_config_mode {
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ast_use_p2a,
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ast_use_dt,
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ast_use_defaults
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};
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#define AST_DRAM_512Mx16 0
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#define AST_DRAM_1Gx16 1
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#define AST_DRAM_512Mx32 2
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#define AST_DRAM_1Gx32 3
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#define AST_DRAM_2Gx16 6
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#define AST_DRAM_4Gx16 7
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#define AST_DRAM_8Gx16 8
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/*
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* Hardware cursor
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*/
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#define AST_MAX_HWC_WIDTH 64
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#define AST_MAX_HWC_HEIGHT 64
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#define AST_HWC_SIZE (AST_MAX_HWC_WIDTH * AST_MAX_HWC_HEIGHT * 2)
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#define AST_HWC_SIGNATURE_SIZE 32
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/* define for signature structure */
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#define AST_HWC_SIGNATURE_CHECKSUM 0x00
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#define AST_HWC_SIGNATURE_SizeX 0x04
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#define AST_HWC_SIGNATURE_SizeY 0x08
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#define AST_HWC_SIGNATURE_X 0x0C
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#define AST_HWC_SIGNATURE_Y 0x10
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#define AST_HWC_SIGNATURE_HOTSPOTX 0x14
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#define AST_HWC_SIGNATURE_HOTSPOTY 0x18
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/*
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* Planes
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*/
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struct ast_plane {
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struct drm_plane base;
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void __iomem *vaddr;
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u64 offset;
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unsigned long size;
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};
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static inline struct ast_plane *to_ast_plane(struct drm_plane *plane)
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{
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return container_of(plane, struct ast_plane, base);
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}
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/*
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* Connector
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*/
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struct ast_connector {
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struct drm_connector base;
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enum drm_connector_status physical_status;
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};
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static inline struct ast_connector *
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to_ast_connector(struct drm_connector *connector)
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{
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return container_of(connector, struct ast_connector, base);
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}
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/*
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* Device
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*/
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struct ast_device {
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struct drm_device base;
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void __iomem *regs;
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void __iomem *ioregs;
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void __iomem *dp501_fw_buf;
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enum ast_config_mode config_mode;
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enum ast_chip chip;
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uint32_t dram_bus_width;
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uint32_t dram_type;
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uint32_t mclk;
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void __iomem *vram;
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unsigned long vram_base;
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unsigned long vram_size;
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unsigned long vram_fb_available;
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struct mutex modeset_lock; /* Protects access to modeset I/O registers in ioregs */
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enum ast_tx_chip tx_chip;
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struct ast_plane primary_plane;
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struct ast_plane cursor_plane;
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struct drm_crtc crtc;
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union {
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struct {
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struct drm_encoder encoder;
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struct ast_connector connector;
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} vga;
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struct {
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struct drm_encoder encoder;
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struct ast_connector connector;
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} sil164;
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struct {
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struct drm_encoder encoder;
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struct ast_connector connector;
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} dp501;
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struct {
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struct drm_encoder encoder;
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struct ast_connector connector;
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} astdp;
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} output;
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bool support_wide_screen;
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u8 *dp501_fw_addr;
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const struct firmware *dp501_fw; /* dp501 fw */
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};
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static inline struct ast_device *to_ast_device(struct drm_device *dev)
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{
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return container_of(dev, struct ast_device, base);
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}
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struct drm_device *ast_device_create(struct pci_dev *pdev,
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const struct drm_driver *drv,
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enum ast_chip chip,
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enum ast_config_mode config_mode,
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void __iomem *regs,
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void __iomem *ioregs,
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bool need_post);
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static inline unsigned long __ast_gen(struct ast_device *ast)
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{
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return __AST_CHIP_GEN(ast->chip);
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}
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#define AST_GEN(__ast) __ast_gen(__ast)
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static inline bool __ast_gen_is_eq(struct ast_device *ast, unsigned long gen)
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{
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return __ast_gen(ast) == gen;
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}
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#define IS_AST_GEN1(__ast) __ast_gen_is_eq(__ast, 1)
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#define IS_AST_GEN2(__ast) __ast_gen_is_eq(__ast, 2)
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#define IS_AST_GEN3(__ast) __ast_gen_is_eq(__ast, 3)
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#define IS_AST_GEN4(__ast) __ast_gen_is_eq(__ast, 4)
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#define IS_AST_GEN5(__ast) __ast_gen_is_eq(__ast, 5)
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#define IS_AST_GEN6(__ast) __ast_gen_is_eq(__ast, 6)
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#define IS_AST_GEN7(__ast) __ast_gen_is_eq(__ast, 7)
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static inline u8 __ast_read8(const void __iomem *addr, u32 reg)
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{
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return ioread8(addr + reg);
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}
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static inline u32 __ast_read32(const void __iomem *addr, u32 reg)
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{
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return ioread32(addr + reg);
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}
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static inline void __ast_write8(void __iomem *addr, u32 reg, u8 val)
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{
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iowrite8(val, addr + reg);
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}
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static inline void __ast_write32(void __iomem *addr, u32 reg, u32 val)
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{
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iowrite32(val, addr + reg);
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}
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static inline u8 __ast_read8_i(void __iomem *addr, u32 reg, u8 index)
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{
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__ast_write8(addr, reg, index);
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return __ast_read8(addr, reg + 1);
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}
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static inline u8 __ast_read8_i_masked(void __iomem *addr, u32 reg, u8 index, u8 read_mask)
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{
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u8 val = __ast_read8_i(addr, reg, index);
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return val & read_mask;
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}
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static inline void __ast_write8_i(void __iomem *addr, u32 reg, u8 index, u8 val)
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{
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__ast_write8(addr, reg, index);
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__ast_write8(addr, reg + 1, val);
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}
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static inline void __ast_write8_i_masked(void __iomem *addr, u32 reg, u8 index, u8 read_mask,
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u8 val)
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{
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u8 tmp = __ast_read8_i_masked(addr, reg, index, read_mask);
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tmp |= val;
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__ast_write8_i(addr, reg, index, tmp);
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}
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static inline u32 ast_read32(struct ast_device *ast, u32 reg)
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{
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return __ast_read32(ast->regs, reg);
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}
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static inline void ast_write32(struct ast_device *ast, u32 reg, u32 val)
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{
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__ast_write32(ast->regs, reg, val);
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}
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static inline u8 ast_io_read8(struct ast_device *ast, u32 reg)
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{
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return __ast_read8(ast->ioregs, reg);
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}
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static inline void ast_io_write8(struct ast_device *ast, u32 reg, u8 val)
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{
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__ast_write8(ast->ioregs, reg, val);
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}
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static inline u8 ast_get_index_reg(struct ast_device *ast, u32 base, u8 index)
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{
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return __ast_read8_i(ast->ioregs, base, index);
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}
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static inline u8 ast_get_index_reg_mask(struct ast_device *ast, u32 base, u8 index,
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u8 preserve_mask)
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{
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return __ast_read8_i_masked(ast->ioregs, base, index, preserve_mask);
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}
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static inline void ast_set_index_reg(struct ast_device *ast, u32 base, u8 index, u8 val)
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{
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__ast_write8_i(ast->ioregs, base, index, val);
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}
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static inline void ast_set_index_reg_mask(struct ast_device *ast, u32 base, u8 index,
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u8 preserve_mask, u8 val)
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{
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__ast_write8_i_masked(ast->ioregs, base, index, preserve_mask, val);
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}
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#define AST_VIDMEM_SIZE_8M 0x00800000
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#define AST_VIDMEM_SIZE_16M 0x01000000
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#define AST_VIDMEM_SIZE_32M 0x02000000
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#define AST_VIDMEM_SIZE_64M 0x04000000
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#define AST_VIDMEM_SIZE_128M 0x08000000
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#define AST_VIDMEM_DEFAULT_SIZE AST_VIDMEM_SIZE_8M
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struct ast_vbios_stdtable {
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u8 misc;
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u8 seq[4];
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u8 crtc[25];
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u8 ar[20];
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u8 gr[9];
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};
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struct ast_vbios_enhtable {
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u32 ht;
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u32 hde;
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u32 hfp;
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u32 hsync;
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u32 vt;
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u32 vde;
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u32 vfp;
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u32 vsync;
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u32 dclk_index;
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u32 flags;
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u32 refresh_rate;
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u32 refresh_rate_index;
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u32 mode_id;
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};
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struct ast_vbios_dclk_info {
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u8 param1;
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u8 param2;
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u8 param3;
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};
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struct ast_vbios_mode_info {
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const struct ast_vbios_stdtable *std_table;
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const struct ast_vbios_enhtable *enh_table;
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};
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struct ast_crtc_state {
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struct drm_crtc_state base;
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/* Last known format of primary plane */
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const struct drm_format_info *format;
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struct ast_vbios_mode_info vbios_mode_info;
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};
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#define to_ast_crtc_state(state) container_of(state, struct ast_crtc_state, base)
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int ast_mode_config_init(struct ast_device *ast);
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#define AST_MM_ALIGN_SHIFT 4
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#define AST_MM_ALIGN_MASK ((1 << AST_MM_ALIGN_SHIFT) - 1)
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#define AST_DP501_FW_VERSION_MASK GENMASK(7, 4)
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#define AST_DP501_FW_VERSION_1 BIT(4)
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#define AST_DP501_PNP_CONNECTED BIT(1)
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#define AST_DP501_DEFAULT_DCLK 65
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#define AST_DP501_GBL_VERSION 0xf000
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#define AST_DP501_PNPMONITOR 0xf010
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#define AST_DP501_LINKRATE 0xf014
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#define AST_DP501_EDID_DATA 0xf020
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/*
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* ASTDP resoultion table:
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* EX: ASTDP_A_B_C:
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* A: Resolution
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* B: Refresh Rate
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* C: Misc information, such as CVT, Reduce Blanked
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*/
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#define ASTDP_640x480_60 0x00
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#define ASTDP_640x480_72 0x01
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#define ASTDP_640x480_75 0x02
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#define ASTDP_640x480_85 0x03
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#define ASTDP_800x600_56 0x04
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#define ASTDP_800x600_60 0x05
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#define ASTDP_800x600_72 0x06
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#define ASTDP_800x600_75 0x07
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#define ASTDP_800x600_85 0x08
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#define ASTDP_1024x768_60 0x09
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#define ASTDP_1024x768_70 0x0A
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#define ASTDP_1024x768_75 0x0B
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#define ASTDP_1024x768_85 0x0C
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#define ASTDP_1280x1024_60 0x0D
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#define ASTDP_1280x1024_75 0x0E
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#define ASTDP_1280x1024_85 0x0F
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#define ASTDP_1600x1200_60 0x10
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#define ASTDP_320x240_60 0x11
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#define ASTDP_400x300_60 0x12
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#define ASTDP_512x384_60 0x13
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#define ASTDP_1920x1200_60 0x14
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#define ASTDP_1920x1080_60 0x15
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#define ASTDP_1280x800_60 0x16
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#define ASTDP_1280x800_60_RB 0x17
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#define ASTDP_1440x900_60 0x18
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#define ASTDP_1440x900_60_RB 0x19
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#define ASTDP_1680x1050_60 0x1A
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#define ASTDP_1680x1050_60_RB 0x1B
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#define ASTDP_1600x900_60 0x1C
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#define ASTDP_1600x900_60_RB 0x1D
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#define ASTDP_1366x768_60 0x1E
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#define ASTDP_1152x864_75 0x1F
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int ast_mm_init(struct ast_device *ast);
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/* ast post */
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void ast_post_gpu(struct ast_device *ast);
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u32 ast_mindwm(struct ast_device *ast, u32 r);
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void ast_moutdwm(struct ast_device *ast, u32 r, u32 v);
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void ast_patch_ahb_2500(void __iomem *regs);
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int ast_vga_output_init(struct ast_device *ast);
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int ast_sil164_output_init(struct ast_device *ast);
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/* ast dp501 */
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bool ast_backup_fw(struct ast_device *ast, u8 *addr, u32 size);
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void ast_init_3rdtx(struct ast_device *ast);
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int ast_dp501_output_init(struct ast_device *ast);
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/* aspeed DP */
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int ast_dp_launch(struct ast_device *ast);
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int ast_astdp_output_init(struct ast_device *ast);
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#endif
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