479 lines
12 KiB
C
479 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0
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// Copyright (c) 2021, ASPEED Technology Inc.
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// Authors: KuoHsiang Chou <kuohsiang_chou@aspeedtech.com>
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#include <linux/firmware.h>
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#include <linux/delay.h>
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#include <drm/drm_atomic_state_helper.h>
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#include <drm/drm_edid.h>
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#include <drm/drm_modeset_helper_vtables.h>
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#include <drm/drm_print.h>
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#include <drm/drm_probe_helper.h>
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#include "ast_drv.h"
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static bool ast_astdp_is_connected(struct ast_device *ast)
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{
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if (!ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xDF, AST_IO_VGACRDF_HPD))
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return false;
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return true;
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}
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static int ast_astdp_read_edid_block(void *data, u8 *buf, unsigned int block, size_t len)
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{
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struct ast_device *ast = data;
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size_t rdlen = round_up(len, 4);
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int ret = 0;
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unsigned int i;
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if (block > 0)
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return -EIO; /* extension headers not supported */
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/*
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* Protect access to I/O registers from concurrent modesetting
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* by acquiring the I/O-register lock.
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*/
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mutex_lock(&ast->modeset_lock);
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/* Start reading EDID data */
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ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xe5, (u8)~AST_IO_VGACRE5_EDID_READ_DONE, 0x00);
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for (i = 0; i < rdlen; i += 4) {
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unsigned int offset;
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unsigned int j;
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u8 ediddata[4];
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u8 vgacre4;
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offset = (i + block * EDID_LENGTH) / 4;
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if (offset >= 64) {
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ret = -EIO;
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goto out;
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}
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vgacre4 = offset;
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/*
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* CRE4[7:0]: Read-Pointer for EDID (Unit: 4bytes); valid range: 0~64
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*/
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ast_set_index_reg(ast, AST_IO_VGACRI, 0xe4, vgacre4);
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/*
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* CRD7[b0]: valid flag for EDID
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* CRD6[b0]: mirror read pointer for EDID
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*/
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for (j = 0; j < 200; ++j) {
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u8 vgacrd7, vgacrd6;
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/*
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* Delay are getting longer with each retry.
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*
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* 1. No delay on first try
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* 2. The Delays are often 2 loops when users request "Display Settings"
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* of right-click of mouse.
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* 3. The Delays are often longer a lot when system resume from S3/S4.
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*/
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if (j)
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mdelay(j + 1);
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/* Wait for EDID offset to show up in mirror register */
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vgacrd7 = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd7);
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if (vgacrd7 & AST_IO_VGACRD7_EDID_VALID_FLAG) {
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vgacrd6 = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd6);
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if (vgacrd6 == offset)
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break;
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}
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}
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if (j == 200) {
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ret = -EBUSY;
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goto out;
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}
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ediddata[0] = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd8);
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ediddata[1] = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd9);
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ediddata[2] = ast_get_index_reg(ast, AST_IO_VGACRI, 0xda);
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ediddata[3] = ast_get_index_reg(ast, AST_IO_VGACRI, 0xdb);
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if (i == 31) {
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/*
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* For 128-bytes EDID_1.3,
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* 1. Add the value of Bytes-126 to Bytes-127.
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* The Bytes-127 is Checksum. Sum of all 128bytes should
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* equal 0 (mod 256).
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* 2. Modify Bytes-126 to be 0.
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* The Bytes-126 indicates the Number of extensions to
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* follow. 0 represents noextensions.
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*/
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ediddata[3] = ediddata[3] + ediddata[2];
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ediddata[2] = 0;
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}
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memcpy(buf, ediddata, min((len - i), 4));
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buf += 4;
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}
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out:
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/* Signal end of reading */
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ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xe5, (u8)~AST_IO_VGACRE5_EDID_READ_DONE,
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AST_IO_VGACRE5_EDID_READ_DONE);
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mutex_unlock(&ast->modeset_lock);
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return ret;
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}
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/*
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* Launch Aspeed DP
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*/
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int ast_dp_launch(struct ast_device *ast)
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{
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struct drm_device *dev = &ast->base;
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unsigned int i = 10;
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while (i) {
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u8 vgacrd1 = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd1);
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if (vgacrd1 & AST_IO_VGACRD1_MCU_FW_EXECUTING)
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break;
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--i;
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msleep(100);
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}
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if (!i) {
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drm_err(dev, "Wait DPMCU executing timeout\n");
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return -ENODEV;
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}
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ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xe5,
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(u8) ~AST_IO_VGACRE5_EDID_READ_DONE,
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AST_IO_VGACRE5_EDID_READ_DONE);
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return 0;
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}
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static bool ast_dp_get_phy_sleep(struct ast_device *ast)
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{
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u8 vgacre3 = ast_get_index_reg(ast, AST_IO_VGACRI, 0xe3);
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return (vgacre3 & AST_IO_VGACRE3_DP_PHY_SLEEP);
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}
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static void ast_dp_set_phy_sleep(struct ast_device *ast, bool sleep)
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{
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u8 vgacre3 = 0x00;
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if (sleep)
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vgacre3 |= AST_IO_VGACRE3_DP_PHY_SLEEP;
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ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xe3, (u8)~AST_IO_VGACRE3_DP_PHY_SLEEP,
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vgacre3);
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msleep(50);
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}
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static void ast_dp_link_training(struct ast_device *ast)
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{
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struct drm_device *dev = &ast->base;
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int i;
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for (i = 0; i < 10; i++) {
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u8 vgacrdc;
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if (i)
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msleep(100);
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vgacrdc = ast_get_index_reg(ast, AST_IO_VGACRI, 0xdc);
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if (vgacrdc & AST_IO_VGACRDC_LINK_SUCCESS)
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return;
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}
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drm_err(dev, "Link training failed\n");
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}
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static bool __ast_dp_wait_enable(struct ast_device *ast, bool enabled)
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{
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u8 vgacrdf_test = 0x00;
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u8 vgacrdf;
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unsigned int i;
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if (enabled)
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vgacrdf_test |= AST_IO_VGACRDF_DP_VIDEO_ENABLE;
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for (i = 0; i < 200; ++i) {
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if (i)
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mdelay(1);
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vgacrdf = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xdf,
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AST_IO_VGACRDF_DP_VIDEO_ENABLE);
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if (vgacrdf == vgacrdf_test)
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return true;
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}
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return false;
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}
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static void ast_dp_set_enable(struct ast_device *ast, bool enabled)
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{
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struct drm_device *dev = &ast->base;
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u8 vgacre3 = 0x00;
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if (enabled)
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vgacre3 |= AST_IO_VGACRE3_DP_VIDEO_ENABLE;
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ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xe3, (u8)~AST_IO_VGACRE3_DP_VIDEO_ENABLE,
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vgacre3);
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drm_WARN_ON(dev, !__ast_dp_wait_enable(ast, enabled));
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}
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static void ast_dp_set_mode(struct drm_crtc *crtc, struct ast_vbios_mode_info *vbios_mode)
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{
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struct ast_device *ast = to_ast_device(crtc->dev);
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u32 ulRefreshRateIndex;
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u8 ModeIdx;
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ulRefreshRateIndex = vbios_mode->enh_table->refresh_rate_index - 1;
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switch (crtc->mode.crtc_hdisplay) {
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case 320:
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ModeIdx = ASTDP_320x240_60;
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break;
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case 400:
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ModeIdx = ASTDP_400x300_60;
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break;
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case 512:
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ModeIdx = ASTDP_512x384_60;
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break;
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case 640:
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ModeIdx = (ASTDP_640x480_60 + (u8) ulRefreshRateIndex);
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break;
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case 800:
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ModeIdx = (ASTDP_800x600_56 + (u8) ulRefreshRateIndex);
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break;
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case 1024:
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ModeIdx = (ASTDP_1024x768_60 + (u8) ulRefreshRateIndex);
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break;
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case 1152:
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ModeIdx = ASTDP_1152x864_75;
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break;
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case 1280:
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if (crtc->mode.crtc_vdisplay == 800)
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ModeIdx = (ASTDP_1280x800_60_RB - (u8) ulRefreshRateIndex);
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else // 1024
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ModeIdx = (ASTDP_1280x1024_60 + (u8) ulRefreshRateIndex);
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break;
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case 1360:
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case 1366:
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ModeIdx = ASTDP_1366x768_60;
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break;
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case 1440:
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ModeIdx = (ASTDP_1440x900_60_RB - (u8) ulRefreshRateIndex);
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break;
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case 1600:
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if (crtc->mode.crtc_vdisplay == 900)
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ModeIdx = (ASTDP_1600x900_60_RB - (u8) ulRefreshRateIndex);
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else //1200
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ModeIdx = ASTDP_1600x1200_60;
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break;
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case 1680:
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ModeIdx = (ASTDP_1680x1050_60_RB - (u8) ulRefreshRateIndex);
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break;
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case 1920:
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if (crtc->mode.crtc_vdisplay == 1080)
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ModeIdx = ASTDP_1920x1080_60;
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else //1200
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ModeIdx = ASTDP_1920x1200_60;
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break;
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default:
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return;
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}
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/*
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* CRE0[7:0]: MISC0 ((0x00: 18-bpp) or (0x20: 24-bpp)
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* CRE1[7:0]: MISC1 (default: 0x00)
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* CRE2[7:0]: video format index (0x00 ~ 0x20 or 0x40 ~ 0x50)
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*/
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ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xE0, ASTDP_AND_CLEAR_MASK,
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ASTDP_MISC0_24bpp);
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ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xE1, ASTDP_AND_CLEAR_MASK, ASTDP_MISC1);
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ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xE2, ASTDP_AND_CLEAR_MASK, ModeIdx);
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}
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static void ast_wait_for_vretrace(struct ast_device *ast)
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{
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unsigned long timeout = jiffies + HZ;
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u8 vgair1;
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do {
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vgair1 = ast_io_read8(ast, AST_IO_VGAIR1_R);
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} while (!(vgair1 & AST_IO_VGAIR1_VREFRESH) && time_before(jiffies, timeout));
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}
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/*
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* Encoder
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*/
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static const struct drm_encoder_funcs ast_astdp_encoder_funcs = {
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.destroy = drm_encoder_cleanup,
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};
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static void ast_astdp_encoder_helper_atomic_mode_set(struct drm_encoder *encoder,
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struct drm_crtc_state *crtc_state,
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struct drm_connector_state *conn_state)
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{
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struct drm_crtc *crtc = crtc_state->crtc;
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struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state);
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struct ast_vbios_mode_info *vbios_mode_info = &ast_crtc_state->vbios_mode_info;
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ast_dp_set_mode(crtc, vbios_mode_info);
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}
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static void ast_astdp_encoder_helper_atomic_enable(struct drm_encoder *encoder,
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struct drm_atomic_state *state)
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{
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struct ast_device *ast = to_ast_device(encoder->dev);
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struct ast_connector *ast_connector = &ast->output.astdp.connector;
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if (ast_connector->physical_status == connector_status_connected) {
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ast_dp_set_phy_sleep(ast, false);
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ast_dp_link_training(ast);
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ast_wait_for_vretrace(ast);
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ast_dp_set_enable(ast, true);
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}
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}
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static void ast_astdp_encoder_helper_atomic_disable(struct drm_encoder *encoder,
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struct drm_atomic_state *state)
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{
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struct ast_device *ast = to_ast_device(encoder->dev);
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ast_dp_set_enable(ast, false);
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ast_dp_set_phy_sleep(ast, true);
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}
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static const struct drm_encoder_helper_funcs ast_astdp_encoder_helper_funcs = {
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.atomic_mode_set = ast_astdp_encoder_helper_atomic_mode_set,
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.atomic_enable = ast_astdp_encoder_helper_atomic_enable,
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.atomic_disable = ast_astdp_encoder_helper_atomic_disable,
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};
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/*
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* Connector
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*/
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static int ast_astdp_connector_helper_get_modes(struct drm_connector *connector)
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{
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struct ast_connector *ast_connector = to_ast_connector(connector);
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int count;
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if (ast_connector->physical_status == connector_status_connected) {
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struct ast_device *ast = to_ast_device(connector->dev);
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const struct drm_edid *drm_edid;
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drm_edid = drm_edid_read_custom(connector, ast_astdp_read_edid_block, ast);
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drm_edid_connector_update(connector, drm_edid);
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count = drm_edid_connector_add_modes(connector);
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drm_edid_free(drm_edid);
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} else {
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drm_edid_connector_update(connector, NULL);
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/*
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* There's no EDID data without a connected monitor. Set BMC-
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* compatible modes in this case. The XGA default resolution
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* should work well for all BMCs.
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*/
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count = drm_add_modes_noedid(connector, 4096, 4096);
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if (count)
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drm_set_preferred_mode(connector, 1024, 768);
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}
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return count;
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}
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static int ast_astdp_connector_helper_detect_ctx(struct drm_connector *connector,
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struct drm_modeset_acquire_ctx *ctx,
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bool force)
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{
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struct ast_connector *ast_connector = to_ast_connector(connector);
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struct ast_device *ast = to_ast_device(connector->dev);
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enum drm_connector_status status = connector_status_disconnected;
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bool phy_sleep;
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mutex_lock(&ast->modeset_lock);
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phy_sleep = ast_dp_get_phy_sleep(ast);
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if (phy_sleep)
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ast_dp_set_phy_sleep(ast, false);
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if (ast_astdp_is_connected(ast))
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status = connector_status_connected;
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if (phy_sleep && status == connector_status_disconnected)
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ast_dp_set_phy_sleep(ast, true);
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mutex_unlock(&ast->modeset_lock);
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if (status != ast_connector->physical_status)
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++connector->epoch_counter;
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ast_connector->physical_status = status;
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return connector_status_connected;
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}
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static const struct drm_connector_helper_funcs ast_astdp_connector_helper_funcs = {
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.get_modes = ast_astdp_connector_helper_get_modes,
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.detect_ctx = ast_astdp_connector_helper_detect_ctx,
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};
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/*
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* Output
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*/
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static const struct drm_connector_funcs ast_astdp_connector_funcs = {
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.reset = drm_atomic_helper_connector_reset,
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.fill_modes = drm_helper_probe_single_connector_modes,
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.destroy = drm_connector_cleanup,
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.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
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};
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int ast_astdp_output_init(struct ast_device *ast)
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{
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struct drm_device *dev = &ast->base;
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struct drm_crtc *crtc = &ast->crtc;
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struct drm_encoder *encoder;
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struct ast_connector *ast_connector;
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struct drm_connector *connector;
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int ret;
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/* encoder */
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encoder = &ast->output.astdp.encoder;
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ret = drm_encoder_init(dev, encoder, &ast_astdp_encoder_funcs,
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DRM_MODE_ENCODER_TMDS, NULL);
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if (ret)
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return ret;
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drm_encoder_helper_add(encoder, &ast_astdp_encoder_helper_funcs);
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encoder->possible_crtcs = drm_crtc_mask(crtc);
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/* connector */
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ast_connector = &ast->output.astdp.connector;
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connector = &ast_connector->base;
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ret = drm_connector_init(dev, connector, &ast_astdp_connector_funcs,
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DRM_MODE_CONNECTOR_DisplayPort);
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if (ret)
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return ret;
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drm_connector_helper_add(connector, &ast_astdp_connector_helper_funcs);
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connector->interlace_allowed = 0;
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connector->doublescan_allowed = 0;
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connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
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ast_connector->physical_status = connector->status;
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ret = drm_connector_attach_encoder(connector, encoder);
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if (ret)
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return ret;
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return 0;
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}
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