justuser-31/JustOS
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
02e73b8cd9
JustOS/linux-6.13/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi
justuser 02e73b8cd9 up
2025-01-24 17:00:19 +03:00

740 lines
15 KiB
Plaintext
Raw Blame History

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2023 Theobroma Systems Design und Consulting GmbH
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include "rk3588.dtsi"
/ {
compatible = "tsd,rk3588-tiger", "rockchip,rk3588";
aliases {
i2c10 = &i2c10;
mmc0 = &sdhci;
rtc0 = &rtc_twi;
};
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
pinctrl-0 = <&emmc_reset>;
pinctrl-names = "default";
reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
};
extcon_usb3: extcon-usb3 {
compatible = "linux,extcon-usb-gpio";
id-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb3_id>;
status = "disabled";
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&module_led_pin>;
/* Named LED1 on the board */
led-1 {
gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
function = LED_FUNCTION_HEARTBEAT;
linux,default-trigger = "heartbeat";
color = <LED_COLOR_ID_AMBER>;
};
};
/*
* 100MHz reference clock for PCIe peripherals from PI6C557-05BLE
* clock generator.
* The clock output is gated via the OE pin on the clock generator.
* This is modeled as a fixed-clock plus a gpio-gate-clock.
*/
pcie_refclk_gen: pcie-refclk-gen-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
};
pcie_refclk: pcie-refclk-clock {
compatible = "gpio-gate-clock";
clocks = <&pcie_refclk_gen>;
#clock-cells = <0>;
enable-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; /* PCIE30X4_CLKREQN_M1_L */
};
vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
compatible = "regulator-fixed";
regulator-name = "vcc_1v1_nldo_s3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
vin-supply = <&vcc5v0_sys>;
};
vcc_1v2_s3: regulator-vcc-1v2-s3 {
compatible = "regulator-fixed";
regulator-name = "vcc_1v2_s3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
vin-supply = <&vcc5v0_sys>;
};
vcc5v0_sys: regulator-vcc5v0-sys {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_baseboard>;
};
};
&cpu_b0 {
cpu-supply = <&vdd_cpu_big0_s0>;
};
&cpu_b1 {
cpu-supply = <&vdd_cpu_big0_s0>;
};
&cpu_b2 {
cpu-supply = <&vdd_cpu_big1_s0>;
};
&cpu_b3 {
cpu-supply = <&vdd_cpu_big1_s0>;
};
&cpu_l0 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
&cpu_l1 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
&cpu_l2 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
&cpu_l3 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
&gmac0 {
clock_in_out = "output";
phy-handle = <&rgmii_phy>;
phy-mode = "rgmii";
phy-supply = <&vcc_1v2_s3>;
pinctrl-names = "default";
pinctrl-0 = <&gmac0_miim
&gmac0_rx_bus2
&gmac0_tx_bus2
&gmac0_rgmii_clk
&gmac0_rgmii_bus
&eth0_pins
&eth_reset>;
tx_delay = <0x10>;
rx_delay = <0x10>;
snps,reset-gpio = <&gpio4 RK_PC3 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 100000>;
};
&gpu {
mali-supply = <&vdd_gpu_s0>;
status = "okay";
};
&hdmi0 {
pinctrl-names = "default";
pinctrl-0 = <&hdmim1_tx0_cec &hdmim0_tx0_hpd &hdmim1_tx0_scl
&hdmim1_tx0_sda>;
};
&i2c1 {
pinctrl-0 = <&i2c1m0_xfer>;
};
&i2c1m0_xfer {
rockchip,pins =
/* i2c1_scl_m0 */
<0 RK_PB5 9 &pcfg_pull_none_drv_level_0>,
/* i2c1_sda_m0 */
<0 RK_PB6 9 &pcfg_pull_none_drv_level_0>;
};
&i2c2 {
pinctrl-0 = <&i2c2m3_xfer>;
status = "okay";
};
&i2c2m3_xfer {
rockchip,pins =
/* i2c2_scl_m3 */
<1 RK_PC5 9 &pcfg_pull_none_drv_level_0>,
/* i2c2_sda_m3 */
<1 RK_PC4 9 &pcfg_pull_none_drv_level_0>;
};
&i2c3 {
pinctrl-0 = <&i2c3m0_xfer>;
};
&i2c4 {
pinctrl-0 = <&i2c4m4_xfer>;
status = "okay";
vdd_npu_s0: regulator@42 {
compatible = "rockchip,rk8602";
reg = <0x42>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_npu_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc5v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
&i2c5 {
pinctrl-0 = <&i2c5m1_xfer>;
};
&i2c5m1_xfer {
rockchip,pins =
/* i2c5_scl_m1 */
<4 RK_PB6 9 &pcfg_pull_none_drv_level_0>,
/* i2c5_sda_m1 */
<4 RK_PB7 9 &pcfg_pull_none_drv_level_0>;
};
&i2c6 {
/*
* Mule-ATtiny can handle up to Fast mode Plus (1MHz) on I2C bus,
* but SOC can handle only up to (400kHz).
*/
clock-frequency = <400000>;
status = "okay";
fan@18 {
compatible = "tsd,mule", "ti,amc6821";
reg = <0x18>;
i2c-mux {
compatible = "tsd,mule-i2c-mux";
#address-cells = <1>;
#size-cells = <0>;
i2c10: i2c@0 {
reg = <0x0>;
#address-cells = <1>;
#size-cells = <0>;
rtc_twi: rtc@6f {
compatible = "isil,isl1208";
reg = <0x6f>;
};
};
};
};
};
&i2c6m0_xfer {
rockchip,pins =
/* i2c6_scl_m0 */
<0 RK_PD0 9 &pcfg_pull_none_drv_level_0>,
/* i2c6_sda_m0 */
<0 RK_PC7 9 &pcfg_pull_none_drv_level_0>;
};
&i2c7 {
status = "okay";
vdd_cpu_big0_s0: regulator@42 {
compatible = "rockchip,rk8602";
reg = <0x42>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_cpu_big0_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <1050000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc5v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_cpu_big1_s0: regulator@43 {
compatible = "rockchip,rk8603", "rockchip,rk8602";
reg = <0x43>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_cpu_big1_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <1050000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc5v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
&i2c7m0_xfer {
rockchip,pins =
/* i2c7_scl_m0 */
<1 RK_PD0 9 &pcfg_pull_none_drv_level_0>,
/* i2c7_sda_m0 */
<1 RK_PD1 9 &pcfg_pull_none_drv_level_0>;
};
&i2c8 {
pinctrl-0 = <&i2c8m2_xfer>;
};
&mdio0 {
rgmii_phy: ethernet-phy@6 {
/* KSZ9031 or KSZ9131 */
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x6>;
clocks = <&cru REFCLKO25M_ETH0_OUT>;
};
};
&pcie3x4 {
/*
* The board has a gpio-controlled "pcie_refclk" generator,
* so add it to the list of clocks.
*/
clocks = <&cru ACLK_PCIE_4L_MSTR>, <&cru ACLK_PCIE_4L_SLV>,
<&cru ACLK_PCIE_4L_DBI>, <&cru PCLK_PCIE_4L>,
<&cru CLK_PCIE_AUX0>, <&cru CLK_PCIE4L_PIPE>,
<&pcie_refclk>;
clock-names = "aclk_mst", "aclk_slv",
"aclk_dbi", "pclk",
"aux", "pipe",
"ref";
reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
};
&pinctrl {
emmc {
emmc_reset: emmc-reset {
rockchip,pins = <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
ethernet {
eth_reset: eth-reset {
rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
leds {
module_led_pin: module-led-pin {
rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb3 {
usb3_id: usb3-id {
rockchip,pins =
<3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&pwm0 {
pinctrl-0 = <&pwm0m1_pins>;
pinctrl-names = "default";
};
&saradc {
vref-supply = <&vcc_1v8_s0>;
status = "okay";
};
&sdhci {
bus-width = <8>;
cap-mmc-highspeed;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
mmc-pwrseq = <&emmc_pwrseq>;
no-sdio;
no-sd;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_data_strobe>;
supports-cqe;
vmmc-supply = <&vcc_3v3_s3>;
vqmmc-supply = <&vcc_1v8_s3>;
status = "okay";
};
&sdmmc {
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <150000000>;
vqmmc-supply = <&vccio_sd_s0>;
};
&spi0 {
pinctrl-0 = <&spi0m1_cs0 &spi0m1_cs1 &spi0m3_pins>;
};
&spi2 {
assigned-clocks = <&cru CLK_SPI2>;
assigned-clock-rates = <200000000>;
num-cs = <1>;
pinctrl-names = "default";
pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
status = "okay";
pmic@0 {
compatible = "rockchip,rk806";
reg = <0x0>;
interrupt-parent = <&gpio0>;
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
gpio-controller;
#gpio-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
<&rk806_dvs2_null>, <&rk806_dvs3_null>;
spi-max-frequency = <1000000>;
system-power-controller;
vcc1-supply = <&vcc5v0_sys>;
vcc2-supply = <&vcc5v0_sys>;
vcc3-supply = <&vcc5v0_sys>;
vcc4-supply = <&vcc5v0_sys>;
vcc5-supply = <&vcc5v0_sys>;
vcc6-supply = <&vcc5v0_sys>;
vcc7-supply = <&vcc5v0_sys>;
vcc8-supply = <&vcc5v0_sys>;
vcc9-supply = <&vcc5v0_sys>;
vcc10-supply = <&vcc5v0_sys>;
vcc11-supply = <&vcc_2v0_pldo_s3>;
vcc12-supply = <&vcc5v0_sys>;
vcc13-supply = <&vcc_1v1_nldo_s3>;
vcc14-supply = <&vcc_1v1_nldo_s3>;
vcca-supply = <&vcc5v0_sys>;
rk806_dvs1_null: dvs1-null-pins {
pins = "gpio_pwrctrl1";
function = "pin_fun0";
};
rk806_dvs2_null: dvs2-null-pins {
pins = "gpio_pwrctrl2";
function = "pin_fun0";
};
rk806_dvs3_null: dvs3-null-pins {
pins = "gpio_pwrctrl3";
function = "pin_fun0";
};
regulators {
vdd_gpu_s0: dcdc-reg1 {
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_gpu_s0";
regulator-enable-ramp-delay = <400>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_cpu_lit_s0: dcdc-reg2 {
regulator-name = "vdd_cpu_lit_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_log_s0: dcdc-reg3 {
regulator-name = "vdd_log_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <675000>;
regulator-max-microvolt = <750000>;
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <750000>;
};
};
vdd_vdenc_s0: dcdc-reg4 {
regulator-name = "vdd_vdenc_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_ddr_s0: dcdc-reg5 {
regulator-name = "vdd_ddr_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <675000>;
regulator-max-microvolt = <900000>;
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <850000>;
};
};
vdd2_ddr_s3: dcdc-reg6 {
regulator-name = "vdd2_ddr_s3";
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
vcc_2v0_pldo_s3: dcdc-reg7 {
regulator-name = "vcc_2v0_pldo_s3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <2000000>;
regulator-max-microvolt = <2000000>;
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <2000000>;
};
};
vcc_3v3_s3: dcdc-reg8 {
regulator-name = "vcc_3v3_s3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vddq_ddr_s0: dcdc-reg9 {
regulator-name = "vddq_ddr_s0";
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8_s3: dcdc-reg10 {
regulator-name = "vcc_1v8_s3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vcca_1v8_s0: pldo-reg1 {
regulator-name = "vcca_1v8_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8_s0: pldo-reg2 {
regulator-name = "vcc_1v8_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vdda_1v2_s0: pldo-reg3 {
regulator-name = "vdda_1v2_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcca_3v3_s0: pldo-reg4 {
regulator-name = "vcca_3v3_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vccio_sd_s0: pldo-reg5 {
regulator-name = "vccio_sd_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
pldo6_s3: pldo-reg6 {
regulator-name = "pldo6_s3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vdd_0v75_s3: nldo-reg1 {
regulator-name = "vdd_0v75_s3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <750000>;
};
};
vdda_ddr_pll_s0: nldo-reg2 {
regulator-name = "vdda_ddr_pll_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <850000>;
};
};
vdda_0v75_s0: nldo-reg3 {
regulator-name = "vdda_0v75_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda_0v85_s0: nldo-reg4 {
regulator-name = "vdda_0v85_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_0v75_s0: nldo-reg5 {
regulator-name = "vdd_0v75_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
};
};
&tsadc {
status = "okay";
};
/* Routed to UART0 on the Q7 connector */
&uart2 {
pinctrl-0 = <&uart2m2_xfer>;
};
/* Mule-ATtiny UPDI */
&uart4 {
pinctrl-0 = <&uart4m2_xfer>;
status = "okay";
};
Reference in New Issue View Git Blame Copy Permalink