57 lines
1.2 KiB
Plaintext
57 lines
1.2 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
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*
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* DT-overlay for Edgeble On-SoM WiFi6/BT M.2 1216 modules,
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* - AW-XM548NF
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* - Intel 8260D2W
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*/
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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&{/} {
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vcc3v3_pcie2x1l1: regulator-vcc3v3-pcie2x1l1 {
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compatible = "regulator-fixed";
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enable-active-high;
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gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; /* WIFI_3V3_EN */
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pinctrl-names = "default";
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pinctrl-0 = <&pcie2_1_vcc3v3_en>;
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regulator-name = "vcc3v3_pcie2x1l1";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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startup-delay-us = <50000>;
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vin-supply = <&vcc5v0_sys>;
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};
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};
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&combphy2_psu {
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status = "okay";
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};
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/* WiFi6 */
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&pcie2x1l1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie2_1_rst>;
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reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; /* PCIE20_2_WIFI_PERSTn */
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vpcie3v3-supply = <&vcc3v3_pcie2x1l1>;
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status = "okay";
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};
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&pinctrl {
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pcie2 {
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pcie2_1_rst: pcie2-1-rst {
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rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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pcie2_1_vcc3v3_en: pcie2-1-vcc-en {
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rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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