176 lines
3.9 KiB
Plaintext
176 lines
3.9 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2012 Sascha Hauer, Uwe Kleine-König, Steffen Trumtrar
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* and Markus Pargmann, Pengutronix
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*/
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/dts-v1/;
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#include "imx27.dtsi"
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/ {
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model = "Phytec pca100";
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compatible = "phytec,imx27-pca100", "fsl,imx27";
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memory@a0000000 {
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device_type = "memory";
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reg = <0xa0000000 0x08000000>; /* 128MB */
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};
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usbotgphy: usbotgphy {
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compatible = "usb-nop-xceiv";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotgphy>;
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reset-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
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#phy-cells = <0>;
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};
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usbh2phy: usbh2phy {
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compatible = "usb-nop-xceiv";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbh2phy>;
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reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
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#phy-cells = <0>;
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};
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};
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&cspi1 {
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cs-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>,
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<&gpio4 27 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec1>;
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status = "okay";
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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eeprom@52 {
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compatible = "atmel,24c32";
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pagesize = <32>;
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reg = <0x52>;
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};
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};
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&iomuxc {
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imx27-phycard-s-som {
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pinctrl_fec1: fec1grp {
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fsl,pins = <
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MX27_PAD_SD3_CMD__FEC_TXD0 0x0
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MX27_PAD_SD3_CLK__FEC_TXD1 0x0
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MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
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MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
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MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
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MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
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MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
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MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
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MX27_PAD_ATA_DATA6__FEC_MDIO 0x0
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MX27_PAD_ATA_DATA7__FEC_MDC 0x0
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MX27_PAD_ATA_DATA8__FEC_CRS 0x0
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MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0
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MX27_PAD_ATA_DATA10__FEC_RXD0 0x0
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MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0
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MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0
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MX27_PAD_ATA_DATA13__FEC_COL 0x0
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MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0
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MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX27_PAD_I2C2_SDA__I2C2_SDA 0x0
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MX27_PAD_I2C2_SCL__I2C2_SCL 0x0
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>;
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};
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pinctrl_nfc: nfcgrp {
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fsl,pins = <
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MX27_PAD_NFRB__NFRB 0x0
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MX27_PAD_NFCLE__NFCLE 0x0
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MX27_PAD_NFWP_B__NFWP_B 0x0
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MX27_PAD_NFCE_B__NFCE_B 0x0
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MX27_PAD_NFALE__NFALE 0x0
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MX27_PAD_NFRE_B__NFRE_B 0x0
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MX27_PAD_NFWE_B__NFWE_B 0x0
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>;
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};
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pinctrl_usbotgphy: usbotgphygrp {
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fsl,pins = <
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MX27_PAD_USBH1_RCV__GPIO2_25 0x1 /* reset gpio */
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>;
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};
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pinctrl_usbotg: usbotggrp {
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fsl,pins = <
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MX27_PAD_USBOTG_CLK__USBOTG_CLK 0x0
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MX27_PAD_USBOTG_DIR__USBOTG_DIR 0x0
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MX27_PAD_USBOTG_NXT__USBOTG_NXT 0x0
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MX27_PAD_USBOTG_STP__USBOTG_STP 0x0
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MX27_PAD_USBOTG_DATA0__USBOTG_DATA0 0x0
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MX27_PAD_USBOTG_DATA1__USBOTG_DATA1 0x0
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MX27_PAD_USBOTG_DATA2__USBOTG_DATA2 0x0
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MX27_PAD_USBOTG_DATA3__USBOTG_DATA3 0x0
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MX27_PAD_USBOTG_DATA4__USBOTG_DATA4 0x0
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MX27_PAD_USBOTG_DATA5__USBOTG_DATA5 0x0
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MX27_PAD_USBOTG_DATA6__USBOTG_DATA6 0x0
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MX27_PAD_USBOTG_DATA7__USBOTG_DATA7 0x0
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>;
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};
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pinctrl_usbh2phy: usbh2phygrp {
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fsl,pins = <
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MX27_PAD_USBH1_SUSP__GPIO2_22 0x0 /* reset gpio */
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>;
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};
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pinctrl_usbh2: usbh2grp {
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fsl,pins = <
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MX27_PAD_USBH2_CLK__USBH2_CLK 0x0
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MX27_PAD_USBH2_DIR__USBH2_DIR 0x0
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MX27_PAD_USBH2_NXT__USBH2_NXT 0x0
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MX27_PAD_USBH2_STP__USBH2_STP 0x0
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MX27_PAD_CSPI2_SCLK__USBH2_DATA0 0x0
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MX27_PAD_CSPI2_MOSI__USBH2_DATA1 0x0
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MX27_PAD_CSPI2_MISO__USBH2_DATA2 0x0
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MX27_PAD_CSPI2_SS1__USBH2_DATA3 0x0
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MX27_PAD_CSPI2_SS2__USBH2_DATA4 0x0
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MX27_PAD_CSPI1_SS2__USBH2_DATA5 0x0
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MX27_PAD_CSPI2_SS0__USBH2_DATA6 0x0
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MX27_PAD_USBH2_DATA7__USBH2_DATA7 0x0
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>;
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};
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};
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};
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&nfc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_nfc>;
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nand-bus-width = <8>;
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nand-ecc-mode = "hw";
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nand-on-flash-bbt;
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status = "okay";
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};
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&usbotg {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg>;
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phy_type = "ulpi";
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phys = <&usbotgphy>;
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status = "okay";
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};
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&usbh2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbh2>;
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phy_type = "ulpi";
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phys = <&usbh2phy>;
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status = "okay";
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};
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