279 lines
9.9 KiB
YAML
279 lines
9.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interrupt-controller/renesas,rzv2h-icu.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas RZ/V2H(P) Interrupt Control Unit
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maintainers:
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- Fabrizio Castro <fabrizio.castro.jz@renesas.com>
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- Geert Uytterhoeven <geert+renesas@glider.be>
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allOf:
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- $ref: /schemas/interrupt-controller.yaml#
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description:
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The Interrupt Control Unit (ICU) handles external interrupts (NMI, IRQ, and
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TINT), error interrupts, DMAC requests, GPT interrupts, and internal
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interrupts.
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properties:
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compatible:
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const: renesas,r9a09g057-icu # RZ/V2H(P)
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'#interrupt-cells':
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description: The first cell is the SPI number of the NMI or the
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PORT_IRQ[0-15] interrupt, as per user manual. The second cell is used to
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specify the flag.
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const: 2
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'#address-cells':
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const: 0
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interrupt-controller: true
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reg:
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maxItems: 1
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interrupts:
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minItems: 58
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items:
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- description: NMI interrupt
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- description: PORT_IRQ0 interrupt
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- description: PORT_IRQ1 interrupt
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- description: PORT_IRQ2 interrupt
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- description: PORT_IRQ3 interrupt
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- description: PORT_IRQ4 interrupt
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- description: PORT_IRQ5 interrupt
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- description: PORT_IRQ6 interrupt
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- description: PORT_IRQ7 interrupt
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- description: PORT_IRQ8 interrupt
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- description: PORT_IRQ9 interrupt
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- description: PORT_IRQ10 interrupt
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- description: PORT_IRQ11 interrupt
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- description: PORT_IRQ12 interrupt
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- description: PORT_IRQ13 interrupt
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- description: PORT_IRQ14 interrupt
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- description: PORT_IRQ15 interrupt
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- description: GPIO interrupt, TINT0
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- description: GPIO interrupt, TINT1
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- description: GPIO interrupt, TINT2
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- description: GPIO interrupt, TINT3
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- description: GPIO interrupt, TINT4
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- description: GPIO interrupt, TINT5
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- description: GPIO interrupt, TINT6
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- description: GPIO interrupt, TINT7
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- description: GPIO interrupt, TINT8
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- description: GPIO interrupt, TINT9
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- description: GPIO interrupt, TINT10
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- description: GPIO interrupt, TINT11
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- description: GPIO interrupt, TINT12
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- description: GPIO interrupt, TINT13
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- description: GPIO interrupt, TINT14
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- description: GPIO interrupt, TINT15
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- description: GPIO interrupt, TINT16
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- description: GPIO interrupt, TINT17
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- description: GPIO interrupt, TINT18
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- description: GPIO interrupt, TINT19
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- description: GPIO interrupt, TINT20
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- description: GPIO interrupt, TINT21
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- description: GPIO interrupt, TINT22
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- description: GPIO interrupt, TINT23
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- description: GPIO interrupt, TINT24
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- description: GPIO interrupt, TINT25
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- description: GPIO interrupt, TINT26
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- description: GPIO interrupt, TINT27
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- description: GPIO interrupt, TINT28
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- description: GPIO interrupt, TINT29
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- description: GPIO interrupt, TINT30
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- description: GPIO interrupt, TINT31
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- description: Software interrupt, INTA55_0
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- description: Software interrupt, INTA55_1
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- description: Software interrupt, INTA55_2
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- description: Software interrupt, INTA55_3
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- description: Error interrupt to CA55
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- description: GTCCRA compare match/input capture (U0)
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- description: GTCCRB compare match/input capture (U0)
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- description: GTCCRA compare match/input capture (U1)
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- description: GTCCRB compare match/input capture (U1)
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interrupt-names:
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minItems: 58
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items:
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- const: nmi
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- const: port_irq0
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- const: port_irq1
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- const: port_irq2
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- const: port_irq3
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- const: port_irq4
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- const: port_irq5
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- const: port_irq6
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- const: port_irq7
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- const: port_irq8
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- const: port_irq9
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- const: port_irq10
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- const: port_irq11
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- const: port_irq12
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- const: port_irq13
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- const: port_irq14
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- const: port_irq15
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- const: tint0
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- const: tint1
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- const: tint2
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- const: tint3
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- const: tint4
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- const: tint5
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- const: tint6
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- const: tint7
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- const: tint8
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- const: tint9
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- const: tint10
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- const: tint11
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- const: tint12
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- const: tint13
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- const: tint14
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- const: tint15
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- const: tint16
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- const: tint17
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- const: tint18
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- const: tint19
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- const: tint20
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- const: tint21
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- const: tint22
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- const: tint23
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- const: tint24
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- const: tint25
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- const: tint26
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- const: tint27
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- const: tint28
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- const: tint29
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- const: tint30
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- const: tint31
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- const: int-ca55-0
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- const: int-ca55-1
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- const: int-ca55-2
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- const: int-ca55-3
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- const: icu-error-ca55
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- const: gpt-u0-gtciada
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- const: gpt-u0-gtciadb
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- const: gpt-u1-gtciada
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- const: gpt-u1-gtciadb
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clocks:
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maxItems: 1
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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required:
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- compatible
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- reg
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- '#interrupt-cells'
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- '#address-cells'
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- interrupt-controller
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- interrupts
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- interrupt-names
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- clocks
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- power-domains
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- resets
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/renesas-cpg-mssr.h>
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icu: interrupt-controller@10400000 {
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compatible = "renesas,r9a09g057-icu";
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reg = <0x10400000 0x10000>;
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#interrupt-cells = <2>;
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#address-cells = <0>;
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interrupt-controller;
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interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 433 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 437 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 441 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 442 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 443 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 447 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 262 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 263 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 265 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "nmi",
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"port_irq0", "port_irq1", "port_irq2",
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"port_irq3", "port_irq4", "port_irq5",
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"port_irq6", "port_irq7", "port_irq8",
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"port_irq9", "port_irq10", "port_irq11",
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"port_irq12", "port_irq13", "port_irq14",
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"port_irq15",
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"tint0", "tint1", "tint2", "tint3",
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"tint4", "tint5", "tint6", "tint7",
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"tint8", "tint9", "tint10", "tint11",
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"tint12", "tint13", "tint14", "tint15",
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"tint16", "tint17", "tint18", "tint19",
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"tint20", "tint21", "tint22", "tint23",
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"tint24", "tint25", "tint26", "tint27",
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"tint28", "tint29", "tint30", "tint31",
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"int-ca55-0", "int-ca55-1",
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"int-ca55-2", "int-ca55-3",
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"icu-error-ca55",
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"gpt-u0-gtciada", "gpt-u0-gtciadb",
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"gpt-u1-gtciada", "gpt-u1-gtciadb";
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clocks = <&cpg CPG_MOD 0x5>;
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power-domains = <&cpg>;
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resets = <&cpg 0x36>;
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};
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