76 lines
2.0 KiB
YAML
76 lines
2.0 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,sm7150-dispcc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Display Clock & Reset Controller for SM7150
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maintainers:
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- Danila Tikhonov <danila@jiaxyga.com>
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- David Wronek <david@mainlining.org>
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- Jens Reidel <adrian@travitia.xyz>
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description: |
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Qualcomm display clock control module provides the clocks, resets and power
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domains on SM7150.
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See also:: include/dt-bindings/clock/qcom,sm7150-dispcc.h
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properties:
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compatible:
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const: qcom,sm7150-dispcc
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clocks:
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items:
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- description: Board XO source
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- description: Board Always On XO source
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- description: GPLL0 source from GCC
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- description: Sleep clock source
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- description: Byte clock from MDSS DSI PHY0
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- description: Pixel clock from MDSS DSI PHY0
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- description: Byte clock from MDSS DSI PHY1
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- description: Pixel clock from MDSS DSI PHY1
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- description: Link clock from DP PHY
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- description: VCO DIV clock from DP PHY
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power-domains:
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maxItems: 1
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description:
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CX power domain.
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required:
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- compatible
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- clocks
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- power-domains
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allOf:
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- $ref: qcom,gcc.yaml#
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,sm7150-gcc.h>
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/power/qcom,rpmhpd.h>
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clock-controller@af00000 {
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compatible = "qcom,sm7150-dispcc";
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reg = <0x0af00000 0x200000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>,
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<&rpmhcc RPMH_CXO_CLK_A>,
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<&gcc GCC_DISP_GPLL0_CLK_SRC>,
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<&sleep_clk>,
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<&mdss_dsi0_phy 0>,
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<&mdss_dsi0_phy 1>,
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<&mdss_dsi1_phy 0>,
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<&mdss_dsi1_phy 1>,
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<&dp_phy 0>,
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<&dp_phy 1>;
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power-domains = <&rpmhpd RPMHPD_CX>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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};
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...
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