195 lines
4.7 KiB
YAML
195 lines
4.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/dsa/vitesse,vsc73xx.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Vitesse VSC73xx DSA Switches
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maintainers:
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- Linus Walleij <linus.walleij@linaro.org>
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description:
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The Vitesse DSA Switches were produced in the early-to-mid 2000s.
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The Vitesse company has been acquired by Microsemi and Microsemi has
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been acquired Microchip but the new owner retains this vendor branding.
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The currently supported switch chips are
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Vitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch
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Vitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch
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Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch
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Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch
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This switch can use one of two different management interfaces.
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If SPI interface is used, the device tree node is an SPI device so it must
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reside inside a SPI bus device tree node, see spi/spi-bus.txt
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When the chip is connected to a parallel memory bus and work in memory-mapped
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I/O mode, a platform device is used to represent the vsc73xx. In this case it
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must reside inside a platform bus device tree node.
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properties:
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compatible:
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enum:
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- vitesse,vsc7385
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- vitesse,vsc7388
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- vitesse,vsc7395
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- vitesse,vsc7398
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reg:
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maxItems: 1
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gpio-controller: true
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"#gpio-cells":
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const: 2
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reset-gpios:
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description: GPIO to be used to reset the whole device
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maxItems: 1
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allOf:
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- $ref: dsa.yaml#/$defs/ethernet-ports
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patternProperties:
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"^(ethernet-)?ports$":
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additionalProperties: true
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patternProperties:
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"^(ethernet-)?port@6$":
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allOf:
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- if:
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properties:
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phy-mode:
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contains:
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enum:
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- rgmii
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then:
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properties:
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rx-internal-delay-ps:
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$ref: "#/$defs/internal-delay-ps"
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tx-internal-delay-ps:
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$ref: "#/$defs/internal-delay-ps"
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# This checks if reg is a chipselect so the device is on an SPI
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# bus, the if-clause will fail if reg is a tuple such as for a
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# platform device.
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if:
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properties:
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reg:
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minimum: 0
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maximum: 256
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then:
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$ref: /schemas/spi/spi-peripheral-props.yaml#
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required:
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- compatible
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- reg
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$defs:
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internal-delay-ps:
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description:
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Disable tunable delay lines using 0 ps, or enable them and select
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the phase between 1400 ps and 2000 ps in increments of 300 ps.
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default: 2000
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enum:
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[0, 1400, 1700, 2000]
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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ethernet-switch@0 {
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compatible = "vitesse,vsc7395";
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reg = <0>;
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spi-max-frequency = <2500000>;
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gpio-controller;
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#gpio-cells = <2>;
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ethernet-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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ethernet-port@0 {
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reg = <0>;
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label = "lan1";
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};
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ethernet-port@1 {
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reg = <1>;
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label = "lan2";
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};
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ethernet-port@2 {
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reg = <2>;
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label = "lan3";
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};
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ethernet-port@3 {
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reg = <3>;
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label = "lan4";
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};
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ethernet-port@6 {
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reg = <6>;
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ethernet = <&gmac1>;
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phy-mode = "rgmii";
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rx-internal-delay-ps = <0>;
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tx-internal-delay-ps = <0>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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pause;
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};
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};
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};
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};
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};
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bus {
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#address-cells = <1>;
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#size-cells = <1>;
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ethernet-switch@10000000 {
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compatible = "vitesse,vsc7385";
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reg = <0x10000000 0x20000>;
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reset-gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
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ethernet-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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ethernet-port@0 {
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reg = <0>;
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label = "lan1";
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};
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ethernet-port@1 {
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reg = <1>;
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label = "lan2";
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};
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ethernet-port@2 {
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reg = <2>;
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label = "lan3";
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};
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ethernet-port@3 {
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reg = <3>;
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label = "lan4";
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};
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ethernet-port@6 {
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reg = <6>;
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ethernet = <&enet0>;
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rx-internal-delay-ps = <0>;
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tx-internal-delay-ps = <0>;
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phy-mode = "rgmii";
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fixed-link {
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speed = <1000>;
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full-duplex;
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pause;
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};
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};
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};
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};
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};
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