221 lines
6.1 KiB
C
221 lines
6.1 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) Meta Platforms, Inc. and affiliates. */
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#include "fbnic.h"
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static void fbnic_hw_stat_rst32(struct fbnic_dev *fbd, u32 reg,
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struct fbnic_stat_counter *stat)
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{
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/* We do not touch the "value" field here.
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* It gets zeroed out on fbd structure allocation.
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* After that we want it to grow continuously
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* through device resets and power state changes.
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*/
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stat->u.old_reg_value_32 = rd32(fbd, reg);
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}
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static void fbnic_hw_stat_rd32(struct fbnic_dev *fbd, u32 reg,
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struct fbnic_stat_counter *stat)
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{
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u32 new_reg_value;
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new_reg_value = rd32(fbd, reg);
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stat->value += new_reg_value - stat->u.old_reg_value_32;
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stat->u.old_reg_value_32 = new_reg_value;
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}
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u64 fbnic_stat_rd64(struct fbnic_dev *fbd, u32 reg, u32 offset)
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{
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u32 prev_upper, upper, lower, diff;
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prev_upper = rd32(fbd, reg + offset);
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lower = rd32(fbd, reg);
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upper = rd32(fbd, reg + offset);
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diff = upper - prev_upper;
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if (!diff)
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return ((u64)upper << 32) | lower;
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if (diff > 1)
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dev_warn_once(fbd->dev,
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"Stats inconsistent, upper 32b of %#010x updating too quickly\n",
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reg * 4);
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/* Return only the upper bits as we cannot guarantee
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* the accuracy of the lower bits. We will add them in
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* when the counter slows down enough that we can get
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* a snapshot with both upper values being the same
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* between reads.
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*/
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return ((u64)upper << 32);
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}
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static void fbnic_hw_stat_rst64(struct fbnic_dev *fbd, u32 reg, s32 offset,
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struct fbnic_stat_counter *stat)
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{
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/* Record initial counter values and compute deltas from there to ensure
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* stats start at 0 after reboot/reset. This avoids exposing absolute
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* hardware counter values to userspace.
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*/
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stat->u.old_reg_value_64 = fbnic_stat_rd64(fbd, reg, offset);
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}
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static void fbnic_hw_stat_rd64(struct fbnic_dev *fbd, u32 reg, s32 offset,
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struct fbnic_stat_counter *stat)
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{
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u64 new_reg_value;
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new_reg_value = fbnic_stat_rd64(fbd, reg, offset);
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stat->value += new_reg_value - stat->u.old_reg_value_64;
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stat->u.old_reg_value_64 = new_reg_value;
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}
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static void fbnic_reset_rpc_stats(struct fbnic_dev *fbd,
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struct fbnic_rpc_stats *rpc)
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{
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fbnic_hw_stat_rst32(fbd,
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FBNIC_RPC_CNTR_UNKN_ETYPE,
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&rpc->unkn_etype);
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fbnic_hw_stat_rst32(fbd,
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FBNIC_RPC_CNTR_UNKN_EXT_HDR,
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&rpc->unkn_ext_hdr);
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fbnic_hw_stat_rst32(fbd, FBNIC_RPC_CNTR_IPV4_FRAG, &rpc->ipv4_frag);
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fbnic_hw_stat_rst32(fbd, FBNIC_RPC_CNTR_IPV6_FRAG, &rpc->ipv6_frag);
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fbnic_hw_stat_rst32(fbd, FBNIC_RPC_CNTR_IPV4_ESP, &rpc->ipv4_esp);
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fbnic_hw_stat_rst32(fbd, FBNIC_RPC_CNTR_IPV6_ESP, &rpc->ipv6_esp);
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fbnic_hw_stat_rst32(fbd, FBNIC_RPC_CNTR_TCP_OPT_ERR, &rpc->tcp_opt_err);
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fbnic_hw_stat_rst32(fbd,
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FBNIC_RPC_CNTR_OUT_OF_HDR_ERR,
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&rpc->out_of_hdr_err);
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fbnic_hw_stat_rst32(fbd,
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FBNIC_RPC_CNTR_OVR_SIZE_ERR,
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&rpc->ovr_size_err);
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}
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static void fbnic_get_rpc_stats32(struct fbnic_dev *fbd,
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struct fbnic_rpc_stats *rpc)
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{
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fbnic_hw_stat_rd32(fbd,
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FBNIC_RPC_CNTR_UNKN_ETYPE,
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&rpc->unkn_etype);
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fbnic_hw_stat_rd32(fbd,
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FBNIC_RPC_CNTR_UNKN_EXT_HDR,
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&rpc->unkn_ext_hdr);
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fbnic_hw_stat_rd32(fbd, FBNIC_RPC_CNTR_IPV4_FRAG, &rpc->ipv4_frag);
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fbnic_hw_stat_rd32(fbd, FBNIC_RPC_CNTR_IPV6_FRAG, &rpc->ipv6_frag);
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fbnic_hw_stat_rd32(fbd, FBNIC_RPC_CNTR_IPV4_ESP, &rpc->ipv4_esp);
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fbnic_hw_stat_rd32(fbd, FBNIC_RPC_CNTR_IPV6_ESP, &rpc->ipv6_esp);
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fbnic_hw_stat_rd32(fbd, FBNIC_RPC_CNTR_TCP_OPT_ERR, &rpc->tcp_opt_err);
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fbnic_hw_stat_rd32(fbd,
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FBNIC_RPC_CNTR_OUT_OF_HDR_ERR,
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&rpc->out_of_hdr_err);
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fbnic_hw_stat_rd32(fbd,
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FBNIC_RPC_CNTR_OVR_SIZE_ERR,
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&rpc->ovr_size_err);
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}
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static void fbnic_reset_pcie_stats_asic(struct fbnic_dev *fbd,
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struct fbnic_pcie_stats *pcie)
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{
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fbnic_hw_stat_rst64(fbd,
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FBNIC_PUL_USER_OB_RD_TLP_CNT_31_0,
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1,
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&pcie->ob_rd_tlp);
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fbnic_hw_stat_rst64(fbd,
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FBNIC_PUL_USER_OB_RD_DWORD_CNT_31_0,
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1,
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&pcie->ob_rd_dword);
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fbnic_hw_stat_rst64(fbd,
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FBNIC_PUL_USER_OB_CPL_TLP_CNT_31_0,
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1,
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&pcie->ob_cpl_tlp);
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fbnic_hw_stat_rst64(fbd,
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FBNIC_PUL_USER_OB_CPL_DWORD_CNT_31_0,
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1,
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&pcie->ob_cpl_dword);
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fbnic_hw_stat_rst64(fbd,
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FBNIC_PUL_USER_OB_WR_TLP_CNT_31_0,
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1,
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&pcie->ob_wr_tlp);
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fbnic_hw_stat_rst64(fbd,
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FBNIC_PUL_USER_OB_WR_DWORD_CNT_31_0,
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1,
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&pcie->ob_wr_dword);
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fbnic_hw_stat_rst64(fbd,
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FBNIC_PUL_USER_OB_RD_DBG_CNT_TAG_31_0,
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1,
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&pcie->ob_rd_no_tag);
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fbnic_hw_stat_rst64(fbd,
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FBNIC_PUL_USER_OB_RD_DBG_CNT_CPL_CRED_31_0,
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1,
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&pcie->ob_rd_no_cpl_cred);
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fbnic_hw_stat_rst64(fbd,
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FBNIC_PUL_USER_OB_RD_DBG_CNT_NP_CRED_31_0,
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1,
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&pcie->ob_rd_no_np_cred);
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}
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static void fbnic_get_pcie_stats_asic64(struct fbnic_dev *fbd,
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struct fbnic_pcie_stats *pcie)
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{
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fbnic_hw_stat_rd64(fbd,
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FBNIC_PUL_USER_OB_RD_TLP_CNT_31_0,
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1,
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&pcie->ob_rd_tlp);
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fbnic_hw_stat_rd64(fbd,
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FBNIC_PUL_USER_OB_RD_DWORD_CNT_31_0,
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1,
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&pcie->ob_rd_dword);
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fbnic_hw_stat_rd64(fbd,
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FBNIC_PUL_USER_OB_WR_TLP_CNT_31_0,
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1,
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&pcie->ob_wr_tlp);
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fbnic_hw_stat_rd64(fbd,
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FBNIC_PUL_USER_OB_WR_DWORD_CNT_31_0,
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1,
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&pcie->ob_wr_dword);
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fbnic_hw_stat_rd64(fbd,
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FBNIC_PUL_USER_OB_CPL_TLP_CNT_31_0,
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1,
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&pcie->ob_cpl_tlp);
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fbnic_hw_stat_rd64(fbd,
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FBNIC_PUL_USER_OB_CPL_DWORD_CNT_31_0,
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1,
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&pcie->ob_cpl_dword);
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fbnic_hw_stat_rd64(fbd,
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FBNIC_PUL_USER_OB_RD_DBG_CNT_TAG_31_0,
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1,
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&pcie->ob_rd_no_tag);
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fbnic_hw_stat_rd64(fbd,
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FBNIC_PUL_USER_OB_RD_DBG_CNT_CPL_CRED_31_0,
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1,
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&pcie->ob_rd_no_cpl_cred);
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fbnic_hw_stat_rd64(fbd,
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FBNIC_PUL_USER_OB_RD_DBG_CNT_NP_CRED_31_0,
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1,
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&pcie->ob_rd_no_np_cred);
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}
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void fbnic_reset_hw_stats(struct fbnic_dev *fbd)
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{
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fbnic_reset_rpc_stats(fbd, &fbd->hw_stats.rpc);
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fbnic_reset_pcie_stats_asic(fbd, &fbd->hw_stats.pcie);
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}
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void fbnic_get_hw_stats32(struct fbnic_dev *fbd)
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{
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fbnic_get_rpc_stats32(fbd, &fbd->hw_stats.rpc);
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}
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void fbnic_get_hw_stats(struct fbnic_dev *fbd)
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{
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fbnic_get_hw_stats32(fbd);
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fbnic_get_pcie_stats_asic64(fbd, &fbd->hw_stats.pcie);
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}
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