166 lines
2.6 KiB
Plaintext
166 lines
2.6 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0-only OR MIT
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/**
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* DT Overlay for dual RPi Camera V2.1 (Sony IMX219) interfaced with CSI2
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* on J721E SK, AM68 SK or AM69-SK board.
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* https://datasheets.raspberrypi.org/camera/camera-v2-schematic.pdf
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*
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* Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
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*/
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/gpio/gpio.h>
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#include "k3-pinctrl.h"
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&{/} {
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clk_imx219_fixed: imx219-xclk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24000000>;
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};
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};
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&csi_mux {
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idle-state = <1>;
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};
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/* CAM0 I2C */
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&cam0_i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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imx219_0: imx219-0@10 {
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compatible = "sony,imx219";
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reg = <0x10>;
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clocks = <&clk_imx219_fixed>;
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clock-names = "xclk";
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port {
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csi2_cam0: endpoint {
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remote-endpoint = <&csi2rx0_in_sensor>;
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link-frequencies = /bits/ 64 <456000000>;
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clock-lanes = <0>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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/* CAM1 I2C */
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&cam1_i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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imx219_1: imx219-1@10 {
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compatible = "sony,imx219";
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reg = <0x10>;
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clocks = <&clk_imx219_fixed>;
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clock-names = "xclk";
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port {
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csi2_cam1: endpoint {
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remote-endpoint = <&csi2rx1_in_sensor>;
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link-frequencies = /bits/ 64 <456000000>;
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clock-lanes = <0>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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&cdns_csi2rx0 {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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csi0_port0: port@0 {
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reg = <0>;
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status = "okay";
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csi2rx0_in_sensor: endpoint {
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remote-endpoint = <&csi2_cam0>;
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bus-type = <4>; /* CSI2 DPHY. */
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clock-lanes = <0>;
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data-lanes = <1 2>;
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};
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};
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csi0_port1: port@1 {
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reg = <1>;
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status = "disabled";
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};
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csi0_port2: port@2 {
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reg = <2>;
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status = "disabled";
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};
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csi0_port3: port@3 {
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reg = <3>;
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status = "disabled";
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};
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csi0_port4: port@4 {
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reg = <4>;
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status = "disabled";
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};
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};
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};
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&dphy0 {
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status = "okay";
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};
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&ti_csi2rx0 {
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status = "okay";
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};
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&cdns_csi2rx1 {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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csi1_port0: port@0 {
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reg = <0>;
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status = "okay";
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csi2rx1_in_sensor: endpoint {
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remote-endpoint = <&csi2_cam1>;
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bus-type = <4>; /* CSI2 DPHY. */
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clock-lanes = <0>;
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data-lanes = <1 2>;
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};
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};
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csi1_port1: port@1 {
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reg = <1>;
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status = "disabled";
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};
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csi1_port2: port@2 {
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reg = <2>;
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status = "disabled";
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};
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csi1_port3: port@3 {
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reg = <3>;
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status = "disabled";
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};
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csi1_port4: port@4 {
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reg = <4>;
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status = "disabled";
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};
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};
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};
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&dphy1 {
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status = "okay";
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};
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&ti_csi2rx1 {
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status = "okay";
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};
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