645 lines
15 KiB
Plaintext
645 lines
15 KiB
Plaintext
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// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
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/*
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* Copyright 2024 NXP
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*/
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/dts-v1/;
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#include <dt-bindings/usb/pd.h>
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#include "imx93.dtsi"
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/ {
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model = "NXP i.MX93 9x9 Quick Start Board";
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compatible = "fsl,imx93-9x9-qsb", "fsl,imx93";
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bt_sco_codec: bt-sco-codec {
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#sound-dai-cells = <1>;
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compatible = "linux,bt-sco";
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};
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chosen {
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stdout-path = &lpuart1;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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linux,cma {
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compatible = "shared-dma-pool";
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reusable;
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size = <0 0x10000000>;
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linux,cma-default;
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};
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vdev0vring0: vdev0vring0@a4000000 {
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reg = <0 0xa4000000 0 0x8000>;
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no-map;
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};
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vdev0vring1: vdev0vring1@a4008000 {
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reg = <0 0xa4008000 0 0x8000>;
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no-map;
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};
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vdev1vring0: vdev1vring0@a4010000 {
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reg = <0 0xa4010000 0 0x8000>;
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no-map;
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};
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vdev1vring1: vdev1vring1@a4018000 {
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reg = <0 0xa4018000 0 0x8000>;
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no-map;
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};
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rsc_table: rsc-table@2021e000 {
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reg = <0 0x2021e000 0 0x1000>;
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no-map;
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};
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vdevbuffer: vdevbuffer@a4020000 {
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compatible = "shared-dma-pool";
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reg = <0 0xa4020000 0 0x100000>;
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no-map;
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};
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};
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reg_vref_1v8: regulator-adc-vref {
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compatible = "regulator-fixed";
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regulator-name = "VREF_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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reg_audio_pwr: regulator-audio-pwr {
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compatible = "regulator-fixed";
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regulator-name = "audio-pwr";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&pcal6524 16 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_rpi_3v3: regulator-rpi {
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compatible = "regulator-fixed";
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regulator-name = "VDD_RPI_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&pcal6524 21 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_usdhc2_vmmc: regulator-usdhc2 {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
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regulator-name = "VSD_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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off-on-delay-us = <12000>;
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};
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sound-bt-sco {
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compatible = "simple-audio-card";
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simple-audio-card,name = "bt-sco-audio";
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simple-audio-card,format = "dsp_a";
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simple-audio-card,bitclock-inversion;
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simple-audio-card,frame-master = <&btcpu>;
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simple-audio-card,bitclock-master = <&btcpu>;
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btcpu: simple-audio-card,cpu {
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sound-dai = <&sai1>;
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dai-tdm-slot-num = <2>;
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dai-tdm-slot-width = <16>;
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};
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simple-audio-card,codec {
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sound-dai = <&bt_sco_codec 1>;
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};
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};
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sound-micfil {
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compatible = "fsl,imx-audio-card";
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model = "micfil-audio";
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pri-dai-link {
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link-name = "micfil hifi";
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format = "i2s";
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cpu {
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sound-dai = <&micfil>;
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};
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};
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};
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sound-wm8962 {
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compatible = "fsl,imx-audio-wm8962";
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model = "wm8962-audio";
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audio-cpu = <&sai3>;
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audio-codec = <&wm8962>;
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hp-det-gpio = <&pcal6524 4 GPIO_ACTIVE_HIGH>;
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audio-routing =
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"Headphone Jack", "HPOUTL",
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"Headphone Jack", "HPOUTR",
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"Ext Spk", "SPKOUTL",
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"Ext Spk", "SPKOUTR",
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"AMIC", "MICBIAS",
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"IN3R", "AMIC",
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"IN1R", "AMIC";
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};
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};
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&adc1 {
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vref-supply = <®_vref_1v8>;
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status = "okay";
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};
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&cm33 {
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mbox-names = "tx", "rx", "rxdb";
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mboxes = <&mu1 0 1>,
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<&mu1 1 1>,
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<&mu1 3 1>;
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memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
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<&vdev1vring0>, <&vdev1vring1>, <&rsc_table>;
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status = "okay";
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};
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&eqos {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_eqos>;
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phy-mode = "rgmii-id";
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phy-handle = <ðphy1>;
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status = "okay";
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mdio {
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compatible = "snps,dwmac-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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clock-frequency = <5000000>;
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ethphy1: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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eee-broken-1000t;
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reset-gpios = <&pcal6524 15 GPIO_ACTIVE_LOW>;
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reset-assert-us = <10000>;
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reset-deassert-us = <80000>;
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realtek,clkout-disable;
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};
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};
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};
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&lpi2c1 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_lpi2c1>;
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status = "okay";
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wm8962: audio-codec@1a {
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compatible = "wlf,wm8962";
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reg = <0x1a>;
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clocks = <&clk IMX93_CLK_SAI3_GATE>;
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DCVDD-supply = <®_audio_pwr>;
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DBVDD-supply = <®_audio_pwr>;
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AVDD-supply = <®_audio_pwr>;
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CPVDD-supply = <®_audio_pwr>;
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MICVDD-supply = <®_audio_pwr>;
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PLLVDD-supply = <®_audio_pwr>;
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SPKVDD1-supply = <®_audio_pwr>;
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SPKVDD2-supply = <®_audio_pwr>;
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gpio-cfg = <
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0x0000 /* 0:Default */
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0x0000 /* 1:Default */
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0x0000 /* 2:FN_DMICCLK */
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0x0000 /* 3:Default */
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0x0000 /* 4:FN_DMICCDAT */
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0x0000 /* 5:Default */
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>;
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};
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ptn5110: tcpc@50 {
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compatible = "nxp,ptn5110", "tcpci";
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reg = <0x50>;
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interrupt-parent = <&gpio3>;
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interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
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typec1_con: connector {
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compatible = "usb-c-connector";
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label = "USB-C";
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power-role = "dual";
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data-role = "dual";
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try-power-role = "sink";
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source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
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sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
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PDO_VAR(5000, 20000, 3000)>;
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op-sink-microwatt = <15000000>;
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self-powered;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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typec1_dr_sw: endpoint {
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remote-endpoint = <&usb1_drd_sw>;
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};
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};
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};
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};
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};
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rtc@53 {
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compatible = "nxp,pcf2131";
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reg = <0x53>;
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interrupt-parent = <&pcal6524>;
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interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
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};
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};
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&lpi2c2 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_lpi2c2>;
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status = "okay";
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pcal6524: gpio@22 {
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compatible = "nxp,pcal6524";
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reg = <0x22>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&gpio3>;
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interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pcal6524>;
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exp-sel-hog {
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gpio-hog;
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gpios = <22 GPIO_ACTIVE_HIGH>;
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output-low;
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};
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mic-can-sel-hog {
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gpio-hog;
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gpios = <17 GPIO_ACTIVE_HIGH>;
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output-low;
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};
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};
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pmic@25 {
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compatible = "nxp,pca9451a";
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reg = <0x25>;
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interrupt-parent = <&pcal6524>;
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interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
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regulators {
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buck1: BUCK1 {
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regulator-name = "BUCK1";
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regulator-min-microvolt = <650000>;
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regulator-max-microvolt = <2237500>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <3125>;
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};
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buck2: BUCK2 {
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regulator-name = "BUCK2";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <2187500>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <3125>;
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};
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buck4: BUCK4 {
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regulator-name = "BUCK4";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <3400000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck5: BUCK5 {
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regulator-name = "BUCK5";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <3400000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck6: BUCK6 {
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regulator-name = "BUCK6";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <3400000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo1: LDO1 {
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regulator-name = "LDO1";
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regulator-min-microvolt = <1600000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo4: LDO4 {
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regulator-name = "LDO4";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo5: LDO5 {
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regulator-name = "LDO5";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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};
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};
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&lpuart1 { /* console */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&micfil {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pdm>;
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assigned-clocks = <&clk IMX93_CLK_PDM>;
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assigned-clock-parents = <&clk IMX93_CLK_AUDIO_PLL>;
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assigned-clock-rates = <49152000>;
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status = "okay";
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};
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&mu1 {
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status = "okay";
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};
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&mu2 {
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status = "okay";
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};
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&sai1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sai1>;
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assigned-clocks = <&clk IMX93_CLK_SAI1>;
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assigned-clock-parents = <&clk IMX93_CLK_AUDIO_PLL>;
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assigned-clock-rates = <12288000>;
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fsl,sai-mclk-direction-output;
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status = "okay";
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};
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&sai3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sai3>;
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assigned-clocks = <&clk IMX93_CLK_SAI3>;
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assigned-clock-parents = <&clk IMX93_CLK_AUDIO_PLL>;
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assigned-clock-rates = <12288000>;
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fsl,sai-mclk-direction-output;
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fsl,sai-synchronous-rx;
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status = "okay";
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};
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&usbotg1 {
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dr_mode = "otg";
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hnp-disable;
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srp-disable;
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adp-disable;
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usb-role-switch;
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disable-over-current;
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samsung,picophy-pre-emp-curr-control = <3>;
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samsung,picophy-dc-vol-level-adjust = <7>;
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status = "okay";
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port {
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usb1_drd_sw: endpoint {
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remote-endpoint = <&typec1_dr_sw>;
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};
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};
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};
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&usdhc1 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc1>;
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pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
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bus-width = <8>;
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non-removable;
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status = "okay";
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};
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&usdhc2 {
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||
|
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||
|
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
|
||
|
pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
|
||
|
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
|
||
|
cd-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
|
||
|
vmmc-supply = <®_usdhc2_vmmc>;
|
||
|
bus-width = <4>;
|
||
|
no-mmc;
|
||
|
status = "okay";
|
||
|
};
|
||
|
|
||
|
&wdog3 {
|
||
|
status = "okay";
|
||
|
};
|
||
|
|
||
|
&iomuxc {
|
||
|
pinctrl_eqos: eqosgrp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_ENET1_MDC__ENET_QOS_MDC 0x57e
|
||
|
MX93_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x57e
|
||
|
MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x57e
|
||
|
MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x57e
|
||
|
MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x57e
|
||
|
MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x57e
|
||
|
MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x58e
|
||
|
MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x57e
|
||
|
MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x57e
|
||
|
MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1 0x57e
|
||
|
MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x57e
|
||
|
MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x57e
|
||
|
MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x58e
|
||
|
MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x57e
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_lpi2c1: lpi2c1grp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_I2C1_SCL__LPI2C1_SCL 0x40000b9e
|
||
|
MX93_PAD_I2C1_SDA__LPI2C1_SDA 0x40000b9e
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_lpi2c2: lpi2c2grp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e
|
||
|
MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_pcal6524: pcal6524grp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_CCM_CLKO1__GPIO3_IO26 0x31e
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_pdm: pdmgrp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_PDM_CLK__PDM_CLK 0x31e
|
||
|
MX93_PAD_PDM_BIT_STREAM0__PDM_BIT_STREAM00 0x31e
|
||
|
MX93_PAD_PDM_BIT_STREAM1__PDM_BIT_STREAM01 0x31e
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_uart1: uart1grp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
|
||
|
MX93_PAD_UART1_TXD__LPUART1_TX 0x31e
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_uart5: uart5grp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_DAP_TDO_TRACESWO__LPUART5_TX 0x31e
|
||
|
MX93_PAD_DAP_TDI__LPUART5_RX 0x31e
|
||
|
MX93_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B 0x31e
|
||
|
MX93_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B 0x31e
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
/* need to config the SION for data and cmd pad, refer to ERR052021 */
|
||
|
pinctrl_usdhc1: usdhc1grp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_SD1_CLK__USDHC1_CLK 0x1582
|
||
|
MX93_PAD_SD1_CMD__USDHC1_CMD 0x40001382
|
||
|
MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x40001382
|
||
|
MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x40001382
|
||
|
MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x40001382
|
||
|
MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x40001382
|
||
|
MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x40001382
|
||
|
MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x40001382
|
||
|
MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x40001382
|
||
|
MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x40001382
|
||
|
MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x1582
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
/* need to config the SION for data and cmd pad, refer to ERR052021 */
|
||
|
pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_SD1_CLK__USDHC1_CLK 0x158e
|
||
|
MX93_PAD_SD1_CMD__USDHC1_CMD 0x4000138e
|
||
|
MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x4000138e
|
||
|
MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x4000138e
|
||
|
MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x4000138e
|
||
|
MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x4000138e
|
||
|
MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x4000138e
|
||
|
MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x4000138e
|
||
|
MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x4000138e
|
||
|
MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x4000138e
|
||
|
MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x158e
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
/* need to config the SION for data and cmd pad, refer to ERR052021 */
|
||
|
pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_SD1_CLK__USDHC1_CLK 0x15fe
|
||
|
MX93_PAD_SD1_CMD__USDHC1_CMD 0x400013fe
|
||
|
MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x400013fe
|
||
|
MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x400013fe
|
||
|
MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x400013fe
|
||
|
MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x400013fe
|
||
|
MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x400013fe
|
||
|
MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x400013fe
|
||
|
MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x400013fe
|
||
|
MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x400013fe
|
||
|
MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x15fe
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x31e
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_sai1: sai1grp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_SAI1_TXC__SAI1_TX_BCLK 0x31e
|
||
|
MX93_PAD_SAI1_TXFS__SAI1_TX_SYNC 0x31e
|
||
|
MX93_PAD_SAI1_TXD0__SAI1_TX_DATA00 0x31e
|
||
|
MX93_PAD_SAI1_RXD0__SAI1_RX_DATA00 0x31e
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_sai3: sai3grp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_GPIO_IO12__SAI3_RX_SYNC 0x31e
|
||
|
MX93_PAD_GPIO_IO18__SAI3_RX_BCLK 0x31e
|
||
|
MX93_PAD_GPIO_IO17__SAI3_MCLK 0x31e
|
||
|
MX93_PAD_GPIO_IO19__SAI3_TX_DATA00 0x31e
|
||
|
MX93_PAD_GPIO_IO20__SAI3_RX_DATA00 0x31e
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_usdhc2_gpio: usdhc2gpiogrp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
/* need to config the SION for data and cmd pad, refer to ERR052021 */
|
||
|
pinctrl_usdhc2: usdhc2grp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_SD2_CLK__USDHC2_CLK 0x1582
|
||
|
MX93_PAD_SD2_CMD__USDHC2_CMD 0x40001382
|
||
|
MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x40001382
|
||
|
MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x40001382
|
||
|
MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x40001382
|
||
|
MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x40001382
|
||
|
MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
/* need to config the SION for data and cmd pad, refer to ERR052021 */
|
||
|
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_SD2_CLK__USDHC2_CLK 0x158e
|
||
|
MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000138e
|
||
|
MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e
|
||
|
MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e
|
||
|
MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000138e
|
||
|
MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000138e
|
||
|
MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
/* need to config the SION for data and cmd pad, refer to ERR052021 */
|
||
|
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_SD2_CLK__USDHC2_CLK 0x15fe
|
||
|
MX93_PAD_SD2_CMD__USDHC2_CMD 0x400013fe
|
||
|
MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x400013fe
|
||
|
MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x400013fe
|
||
|
MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x400013fe
|
||
|
MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x400013fe
|
||
|
MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
|
||
|
>;
|
||
|
};
|
||
|
};
|