424 lines
9.5 KiB
Plaintext
424 lines
9.5 KiB
Plaintext
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2023 Y Soft
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*/
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/dts-v1/;
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#include "imx8mp.dtsi"
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/ {
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compatible = "ysoft,imx8mp-iota2-lumpy", "fsl,imx8mp";
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model = "Y Soft i.MX8MPlus IOTA2 Lumpy board";
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beeper {
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compatible = "pwm-beeper";
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pwms = <&pwm4 0 500000 0>;
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};
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chosen {
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stdout-path = &uart2;
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};
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gpio_keys: gpio-keys {
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compatible = "gpio-keys";
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pinctrl-0 = <&pinctrl_gpio_keys>;
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pinctrl-names = "default";
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button-reset {
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gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
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label = "Factory RESET";
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linux,code = <BTN_0>;
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};
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};
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reg_usb_host: regulator-usb-host {
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compatible = "regulator-fixed";
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pinctrl-0 = <&pinctrl_usb_host_vbus>;
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pinctrl-names = "default";
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regulator-max-microvolt = <5000000>;
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regulator-min-microvolt = <5000000>;
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regulator-name = "usb-host";
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gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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memory@40000000 {
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reg = <0x0 0x40000000 0 0x80000000>,
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<0x1 0x00000000 0 0x80000000>;
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device_type = "memory";
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};
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};
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&A53_0 {
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cpu-supply = <®_arm>;
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};
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&A53_1 {
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cpu-supply = <®_arm>;
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};
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&A53_2 {
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cpu-supply = <®_arm>;
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};
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&A53_3 {
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cpu-supply = <®_arm>;
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};
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&eqos {
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phy-handle = <ðphy0>;
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phy-mode = "rgmii-id";
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pinctrl-0 = <&pinctrl_eqos>;
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pinctrl-names = "default";
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status = "okay";
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mdio {
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compatible = "snps,dwmac-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy0: ethernet-phy@0 {
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reg = <0>;
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interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
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interrupt-parent = <&gpio3>;
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pinctrl-0 = <&pinctrl_ethphy0>;
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pinctrl-names = "default";
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reset-assert-us = <1000>;
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reset-deassert-us = <1000>;
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reset-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
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micrel,led-mode = <0>;
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};
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};
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};
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&fec {
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fsl,magic-packet;
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phy-handle = <ðphy1>;
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phy-mode = "rgmii-id";
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pinctrl-0 = <&pinctrl_fec>;
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pinctrl-names = "default";
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy1: ethernet-phy@0 {
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reg = <0>;
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interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
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interrupt-parent = <&gpio3>;
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pinctrl-0 = <&pinctrl_ethphy1>;
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pinctrl-names = "default";
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reset-assert-us = <1000>;
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reset-deassert-us = <1000>;
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reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
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micrel,led-mode = <0>;
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};
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};
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};
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&i2c1 {
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clock-frequency = <400000>;
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pinctrl-0 = <&pinctrl_i2c1>;
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pinctrl-names = "default";
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status = "okay";
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pmic@25 {
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compatible = "nxp,pca9450c";
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reg = <0x25>;
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interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
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interrupt-parent = <&gpio1>;
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pinctrl-0 = <&pinctrl_pmic>;
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pinctrl-names = "default";
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regulators {
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BUCK1 {
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regulator-always-on;
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regulator-boot-on;
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regulator-max-microvolt = <1000000>;
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regulator-min-microvolt = <720000>;
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regulator-name = "BUCK1";
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regulator-ramp-delay = <3125>;
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};
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reg_arm: BUCK2 {
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nxp,dvs-run-voltage = <950000>;
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nxp,dvs-standby-voltage = <850000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-max-microvolt = <1025000>;
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regulator-min-microvolt = <720000>;
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regulator-name = "BUCK2";
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regulator-ramp-delay = <3125>;
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};
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BUCK4 {
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regulator-always-on;
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regulator-boot-on;
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regulator-max-microvolt = <3600000>;
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regulator-min-microvolt = <3000000>;
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regulator-name = "BUCK4";
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};
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BUCK5 {
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regulator-always-on;
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regulator-boot-on;
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regulator-max-microvolt = <1950000>;
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regulator-min-microvolt = <1650000>;
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regulator-name = "BUCK5";
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};
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BUCK6 {
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regulator-always-on;
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regulator-boot-on;
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regulator-max-microvolt = <1155000>;
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regulator-min-microvolt = <1045000>;
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regulator-name = "BUCK6";
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};
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LDO1 {
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regulator-always-on;
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regulator-boot-on;
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regulator-max-microvolt = <1950000>;
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regulator-min-microvolt = <1650000>;
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regulator-name = "LDO1";
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};
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LDO3 {
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regulator-always-on;
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regulator-boot-on;
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regulator-max-microvolt = <1890000>;
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regulator-min-microvolt = <1710000>;
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regulator-name = "LDO3";
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};
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LDO4 {
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regulator-always-on;
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regulator-boot-on;
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regulator-max-microvolt = <950000>;
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regulator-min-microvolt = <850000>;
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regulator-name = "LDO4";
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};
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LDO5 {
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regulator-always-on;
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regulator-boot-on;
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regulator-max-microvolt = <3300000>;
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regulator-min-microvolt = <1800000>;
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regulator-name = "LDO5";
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};
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};
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};
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};
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&i2c2 {
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clock-frequency = <400000>;
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pinctrl-0 = <&pinctrl_i2c2>;
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pinctrl-names = "default";
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status = "okay";
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rtc: rtc@68 {
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compatible = "dallas,ds1341";
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reg = <0x68>;
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};
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};
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&pwm4 {
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pinctrl-0 = <&pinctrl_pwm4>;
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pinctrl-names = "default";
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status = "okay";
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};
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&uart2 {
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pinctrl-0 = <&pinctrl_uart2>;
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pinctrl-names = "default";
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status = "okay";
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};
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&usb3_1 {
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status = "okay";
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};
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&usb3_phy1 {
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vbus-supply = <®_usb_host>;
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status = "okay";
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};
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&usb_dwc3_1 {
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dr_mode = "host";
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status = "okay";
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};
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&usdhc3 {
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assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
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assigned-clock-rates = <400000000>;
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pinctrl-0 = <&pinctrl_usdhc3>;
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pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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bus-width = <8>;
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non-removable;
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status = "okay";
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};
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&wdog1 {
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pinctrl-0 = <&pinctrl_wdog>;
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pinctrl-names = "default";
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fsl,ext-reset-output;
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status = "okay";
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};
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&iomuxc {
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pinctrl_eqos: eqosgrp {
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fsl,pins = <
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MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x2
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MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x2
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MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x90
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MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x90
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MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x90
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MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x90
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MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x90
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MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x90
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MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x16
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MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x16
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MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x16
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MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x16
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MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x16
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MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x16
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>;
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};
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pinctrl_ethphy0: ethphy0grp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x10
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MX8MP_IOMUXC_SAI5_RXD1__GPIO3_IO22 0x10
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>;
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};
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pinctrl_ethphy1: ethphy1grp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI5_RXFS__GPIO3_IO19 0x10
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MX8MP_IOMUXC_SAI5_RXC__GPIO3_IO20 0x10
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>;
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};
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pinctrl_fec: fecgrp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x2
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MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x2
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MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90
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MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90
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MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90
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MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x90
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MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90
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MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90
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MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x16
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MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x16
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MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x16
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MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x16
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MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x16
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MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x16
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>;
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};
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pinctrl_gpio_keys: gpiokeysgrp {
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fsl,pins = <
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MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07 0x80
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2
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MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c2
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2
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MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2
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>;
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};
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pinctrl_pmic: pmicgrp {
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fsl,pins = <
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MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x1c0
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>;
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};
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pinctrl_pwm4: pwm4grp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI3_MCLK__PWM4_OUT 0x102
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x0
|
||
|
|
MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x0
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usb_host_vbus: usb1grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MP_IOMUXC_GPIO1_IO14__USB2_OTG_PWR 0x0
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194
|
||
|
|
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4
|
||
|
|
MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4
|
||
|
|
MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4
|
||
|
|
MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4
|
||
|
|
MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4
|
||
|
|
MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4
|
||
|
|
MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4
|
||
|
|
MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4
|
||
|
|
MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4
|
||
|
|
MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196
|
||
|
|
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6
|
||
|
|
MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d6
|
||
|
|
MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d6
|
||
|
|
MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d6
|
||
|
|
MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d6
|
||
|
|
MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d6
|
||
|
|
MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d6
|
||
|
|
MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d6
|
||
|
|
MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d6
|
||
|
|
MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usdhc3: usdhc3grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190
|
||
|
|
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0
|
||
|
|
MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0
|
||
|
|
MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0
|
||
|
|
MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0
|
||
|
|
MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0
|
||
|
|
MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0
|
||
|
|
MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0
|
||
|
|
MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0
|
||
|
|
MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0
|
||
|
|
MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_wdog: wdoggrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0x166
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
};
|