141 lines
2.9 KiB
C
141 lines
2.9 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2023 Arm Ltd.
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*/
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#ifndef _PKEYS_ARM64_H
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#define _PKEYS_ARM64_H
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#include "vm_util.h"
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/* for signal frame parsing */
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#include "../arm64/signal/testcases/testcases.h"
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#ifndef SYS_mprotect_key
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# define SYS_mprotect_key 288
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#endif
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#ifndef SYS_pkey_alloc
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# define SYS_pkey_alloc 289
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# define SYS_pkey_free 290
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#endif
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#define MCONTEXT_IP(mc) mc.pc
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#define MCONTEXT_TRAPNO(mc) -1
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#define PKEY_MASK 0xf
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#define POE_NONE 0x0
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#define POE_X 0x2
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#define POE_RX 0x3
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#define POE_RWX 0x7
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#define NR_PKEYS 8
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#define NR_RESERVED_PKEYS 1 /* pkey-0 */
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#define PKEY_ALLOW_ALL 0x77777777
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#define PKEY_REG_ALLOW_NONE 0x0
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#define PKEY_BITS_PER_PKEY 4
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#define PAGE_SIZE sysconf(_SC_PAGESIZE)
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#undef HPAGE_SIZE
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#define HPAGE_SIZE default_huge_page_size()
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/* 4-byte instructions * 16384 = 64K page */
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#define __page_o_noops() asm(".rept 16384 ; nop; .endr")
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static inline u64 __read_pkey_reg(void)
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{
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u64 pkey_reg = 0;
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// POR_EL0
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asm volatile("mrs %0, S3_3_c10_c2_4" : "=r" (pkey_reg));
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return pkey_reg;
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}
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static inline void __write_pkey_reg(u64 pkey_reg)
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{
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u64 por = pkey_reg;
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dprintf4("%s() changing %016llx to %016llx\n",
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__func__, __read_pkey_reg(), pkey_reg);
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// POR_EL0
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asm volatile("msr S3_3_c10_c2_4, %0\nisb" :: "r" (por) :);
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dprintf4("%s() pkey register after changing %016llx to %016llx\n",
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__func__, __read_pkey_reg(), pkey_reg);
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}
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static inline int cpu_has_pkeys(void)
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{
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/* No simple way to determine this */
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return 1;
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}
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static inline u32 pkey_bit_position(int pkey)
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{
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return pkey * PKEY_BITS_PER_PKEY;
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}
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static inline int get_arch_reserved_keys(void)
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{
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return NR_RESERVED_PKEYS;
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}
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void expect_fault_on_read_execonly_key(void *p1, int pkey)
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{
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}
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void *malloc_pkey_with_mprotect_subpage(long size, int prot, u16 pkey)
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{
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return PTR_ERR_ENOTSUP;
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}
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#define set_pkey_bits set_pkey_bits
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static inline u64 set_pkey_bits(u64 reg, int pkey, u64 flags)
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{
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u32 shift = pkey_bit_position(pkey);
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u64 new_val = POE_RWX;
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/* mask out bits from pkey in old value */
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reg &= ~((u64)PKEY_MASK << shift);
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if (flags & PKEY_DISABLE_ACCESS)
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new_val = POE_X;
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else if (flags & PKEY_DISABLE_WRITE)
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new_val = POE_RX;
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/* OR in new bits for pkey */
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reg |= new_val << shift;
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return reg;
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}
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#define get_pkey_bits get_pkey_bits
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static inline u64 get_pkey_bits(u64 reg, int pkey)
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{
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u32 shift = pkey_bit_position(pkey);
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/*
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* shift down the relevant bits to the lowest four, then
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* mask off all the other higher bits
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*/
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u32 perm = (reg >> shift) & PKEY_MASK;
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if (perm == POE_X)
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return PKEY_DISABLE_ACCESS;
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if (perm == POE_RX)
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return PKEY_DISABLE_WRITE;
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return 0;
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}
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static inline void aarch64_write_signal_pkey(ucontext_t *uctxt, u64 pkey)
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{
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struct _aarch64_ctx *ctx = GET_UC_RESV_HEAD(uctxt);
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struct poe_context *poe_ctx =
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(struct poe_context *) get_header(ctx, POE_MAGIC,
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sizeof(uctxt->uc_mcontext), NULL);
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if (poe_ctx)
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poe_ctx->por_el0 = pkey;
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}
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#endif /* _PKEYS_ARM64_H */
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