33 lines
1.4 KiB
C
33 lines
1.4 KiB
C
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/* SPDX-License-Identifier: GPL-2.0
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*
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* MediaTek 8365 AFE clock control definitions
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*
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* Copyright (c) 2024 MediaTek Inc.
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* Authors: Jia Zeng <jia.zeng@mediatek.com>
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* Alexandre Mergnat <amergnat@baylibre.com>
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*/
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#ifndef _MT8365_AFE_UTILS_H_
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#define _MT8365_AFE_UTILS_H_
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struct mtk_base_afe;
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struct clk;
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int mt8365_afe_init_audio_clk(struct mtk_base_afe *afe);
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void mt8365_afe_disable_clk(struct mtk_base_afe *afe, struct clk *clk);
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int mt8365_afe_set_clk_rate(struct mtk_base_afe *afe, struct clk *clk, unsigned int rate);
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int mt8365_afe_set_clk_parent(struct mtk_base_afe *afe, struct clk *clk, struct clk *parent);
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int mt8365_afe_enable_top_cg(struct mtk_base_afe *afe, unsigned int cg_type);
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int mt8365_afe_disable_top_cg(struct mtk_base_afe *afe, unsigned int cg_type);
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int mt8365_afe_enable_main_clk(struct mtk_base_afe *afe);
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int mt8365_afe_disable_main_clk(struct mtk_base_afe *afe);
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int mt8365_afe_emi_clk_on(struct mtk_base_afe *afe);
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int mt8365_afe_emi_clk_off(struct mtk_base_afe *afe);
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int mt8365_afe_enable_afe_on(struct mtk_base_afe *afe);
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int mt8365_afe_disable_afe_on(struct mtk_base_afe *afe);
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int mt8365_afe_enable_apll_tuner_cfg(struct mtk_base_afe *afe, unsigned int apll);
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int mt8365_afe_disable_apll_tuner_cfg(struct mtk_base_afe *afe, unsigned int apll);
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int mt8365_afe_enable_apll_associated_cfg(struct mtk_base_afe *afe, unsigned int apll);
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int mt8365_afe_disable_apll_associated_cfg(struct mtk_base_afe *afe, unsigned int apll);
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#endif
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