438 lines
13 KiB
C
438 lines
13 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/* Texas Instruments ICSSG Ethernet driver
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*
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* Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/
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*
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*/
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#ifndef __NET_TI_ICSSG_PRUETH_H
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#define __NET_TI_ICSSG_PRUETH_H
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#include <linux/etherdevice.h>
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#include <linux/genalloc.h>
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#include <linux/if_vlan.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/net_tstamp.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/of_mdio.h>
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#include <linux/of_net.h>
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#include <linux/of_platform.h>
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#include <linux/phy.h>
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#include <linux/remoteproc/pruss.h>
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#include <linux/pruss_driver.h>
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#include <linux/ptp_clock_kernel.h>
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#include <linux/remoteproc.h>
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#include <linux/dma-mapping.h>
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#include <linux/dma/ti-cppi5.h>
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#include <linux/dma/k3-udma-glue.h>
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#include <net/devlink.h>
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#include "icssg_config.h"
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#include "icss_iep.h"
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#include "icssg_switch_map.h"
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#define PRUETH_MAX_MTU (2000 - ETH_HLEN - ETH_FCS_LEN)
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#define PRUETH_MIN_PKT_SIZE (VLAN_ETH_ZLEN)
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#define PRUETH_MAX_PKT_SIZE (PRUETH_MAX_MTU + ETH_HLEN + ETH_FCS_LEN)
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#define ICSS_SLICE0 0
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#define ICSS_SLICE1 1
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#define ICSS_FW_PRU 0
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#define ICSS_FW_RTU 1
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#define ICSSG_MAX_RFLOWS 8 /* per slice */
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#define ICSSG_NUM_PA_STATS 4
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#define ICSSG_NUM_MIIG_STATS 60
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/* Number of ICSSG related stats */
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#define ICSSG_NUM_STATS (ICSSG_NUM_MIIG_STATS + ICSSG_NUM_PA_STATS)
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#define ICSSG_NUM_STANDARD_STATS 31
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#define ICSSG_NUM_ETHTOOL_STATS (ICSSG_NUM_STATS - ICSSG_NUM_STANDARD_STATS)
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#define IEP_DEFAULT_CYCLE_TIME_NS 1000000 /* 1 ms */
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#define PRUETH_UNDIRECTED_PKT_DST_TAG 0
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#define PRUETH_UNDIRECTED_PKT_TAG_INS BIT(30)
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/* Firmware status codes */
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#define ICSS_HS_FW_READY 0x55555555
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#define ICSS_HS_FW_DEAD 0xDEAD0000 /* lower 16 bits contain error code */
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/* Firmware command codes */
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#define ICSS_HS_CMD_BUSY 0x40000000
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#define ICSS_HS_CMD_DONE 0x80000000
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#define ICSS_HS_CMD_CANCEL 0x10000000
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/* Firmware commands */
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#define ICSS_CMD_SPAD 0x20
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#define ICSS_CMD_RXTX 0x10
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#define ICSS_CMD_ADD_FDB 0x1
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#define ICSS_CMD_DEL_FDB 0x2
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#define ICSS_CMD_SET_RUN 0x4
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#define ICSS_CMD_GET_FDB_SLOT 0x5
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#define ICSS_CMD_ENABLE_VLAN 0x5
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#define ICSS_CMD_DISABLE_VLAN 0x6
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#define ICSS_CMD_ADD_FILTER 0x7
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#define ICSS_CMD_ADD_MAC 0x8
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/* In switch mode there are 3 real ports i.e. 3 mac addrs.
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* however Linux sees only the host side port. The other 2 ports
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* are the switch ports.
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* In emac mode there are 2 real ports i.e. 2 mac addrs.
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* Linux sees both the ports.
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*/
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enum prueth_port {
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PRUETH_PORT_HOST = 0, /* host side port */
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PRUETH_PORT_MII0, /* physical port RG/SG MII 0 */
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PRUETH_PORT_MII1, /* physical port RG/SG MII 1 */
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PRUETH_PORT_INVALID, /* Invalid prueth port */
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};
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enum prueth_mac {
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PRUETH_MAC0 = 0,
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PRUETH_MAC1,
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PRUETH_NUM_MACS,
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PRUETH_MAC_INVALID,
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};
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struct prueth_tx_chn {
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struct device *dma_dev;
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struct napi_struct napi_tx;
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struct k3_cppi_desc_pool *desc_pool;
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struct k3_udma_glue_tx_channel *tx_chn;
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struct prueth_emac *emac;
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u32 id;
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u32 descs_num;
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unsigned int irq;
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char name[32];
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struct hrtimer tx_hrtimer;
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unsigned long tx_pace_timeout_ns;
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};
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struct prueth_rx_chn {
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struct device *dev;
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struct device *dma_dev;
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struct k3_cppi_desc_pool *desc_pool;
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struct k3_udma_glue_rx_channel *rx_chn;
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u32 descs_num;
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unsigned int irq[ICSSG_MAX_RFLOWS]; /* separate irq per flow */
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char name[32];
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};
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/* There are 4 Tx DMA channels, but the highest priority is CH3 (thread 3)
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* and lower three are lower priority channels or threads.
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*/
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#define PRUETH_MAX_TX_QUEUES 4
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#define PRUETH_MAX_TX_TS_REQUESTS 50 /* Max simultaneous TX_TS requests */
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/* Minimum coalesce time in usecs for both Tx and Rx */
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#define ICSSG_MIN_COALESCE_USECS 20
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/* data for each emac port */
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struct prueth_emac {
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bool is_sr1;
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struct prueth *prueth;
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struct net_device *ndev;
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u8 mac_addr[6];
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struct napi_struct napi_rx;
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u32 msg_enable;
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int link;
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int speed;
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int duplex;
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const char *phy_id;
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struct device_node *phy_node;
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phy_interface_t phy_if;
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enum prueth_port port_id;
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struct icss_iep *iep;
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unsigned int rx_ts_enabled : 1;
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unsigned int tx_ts_enabled : 1;
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unsigned int half_duplex : 1;
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/* DMA related */
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struct prueth_tx_chn tx_chns[PRUETH_MAX_TX_QUEUES];
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struct completion tdown_complete;
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atomic_t tdown_cnt;
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struct prueth_rx_chn rx_chns;
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int rx_flow_id_base;
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int tx_ch_num;
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/* SR1.0 Management channel */
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struct prueth_rx_chn rx_mgm_chn;
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int rx_mgm_flow_id_base;
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spinlock_t lock; /* serialize access */
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/* TX HW Timestamping */
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/* TX TS cookie will be index to the tx_ts_skb array */
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struct sk_buff *tx_ts_skb[PRUETH_MAX_TX_TS_REQUESTS];
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atomic_t tx_ts_pending;
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int tx_ts_irq;
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u8 cmd_seq;
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/* shutdown related */
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__le32 cmd_data[4];
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struct completion cmd_complete;
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/* Mutex to serialize access to firmware command interface */
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struct mutex cmd_lock;
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struct work_struct rx_mode_work;
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struct workqueue_struct *cmd_wq;
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struct pruss_mem_region dram;
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bool offload_fwd_mark;
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int port_vlan;
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struct delayed_work stats_work;
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u64 stats[ICSSG_NUM_MIIG_STATS];
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u64 pa_stats[ICSSG_NUM_PA_STATS];
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/* RX IRQ Coalescing Related */
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struct hrtimer rx_hrtimer;
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unsigned long rx_pace_timeout_ns;
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};
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/**
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* struct prueth_pdata - PRUeth platform data
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* @fdqring_mode: Free desc queue mode
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* @quirk_10m_link_issue: 10M link detect errata
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* @switch_mode: switch firmware support
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*/
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struct prueth_pdata {
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enum k3_ring_mode fdqring_mode;
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u32 quirk_10m_link_issue:1;
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u32 switch_mode:1;
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};
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struct icssg_firmwares {
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char *pru;
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char *rtu;
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char *txpru;
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};
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/**
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* struct prueth - PRUeth structure
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* @dev: device
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* @pruss: pruss handle
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* @pru: rproc instances of PRUs
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* @rtu: rproc instances of RTUs
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* @txpru: rproc instances of TX_PRUs
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* @shram: PRUSS shared RAM region
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* @sram_pool: MSMC RAM pool for buffers
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* @msmcram: MSMC RAM region
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* @eth_node: DT node for the port
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* @emac: private EMAC data structure
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* @registered_netdevs: list of registered netdevs
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* @miig_rt: regmap to mii_g_rt block
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* @mii_rt: regmap to mii_rt block
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* @pa_stats: regmap to pa_stats block
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* @pru_id: ID for each of the PRUs
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* @pdev: pointer to ICSSG platform device
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* @pdata: pointer to platform data for ICSSG driver
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* @icssg_hwcmdseq: seq counter or HWQ messages
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* @emacs_initialized: num of EMACs/ext ports that are up/running
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* @iep0: pointer to IEP0 device
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* @iep1: pointer to IEP1 device
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* @vlan_tbl: VLAN-FID table pointer
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* @hw_bridge_dev: pointer to HW bridge net device
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* @hsr_dev: pointer to the HSR net device
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* @br_members: bitmask of bridge member ports
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* @hsr_members: bitmask of hsr member ports
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* @prueth_netdevice_nb: netdevice notifier block
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* @prueth_switchdev_nb: switchdev notifier block
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* @prueth_switchdev_bl_nb: switchdev blocking notifier block
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* @is_switch_mode: flag to indicate if device is in Switch mode
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* @is_hsr_offload_mode: flag to indicate if device is in hsr offload mode
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* @is_switchmode_supported: indicates platform support for switch mode
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* @switch_id: ID for mapping switch ports to bridge
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* @default_vlan: Default VLAN for host
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*/
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struct prueth {
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struct device *dev;
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struct pruss *pruss;
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struct rproc *pru[PRUSS_NUM_PRUS];
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struct rproc *rtu[PRUSS_NUM_PRUS];
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struct rproc *txpru[PRUSS_NUM_PRUS];
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struct pruss_mem_region shram;
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struct gen_pool *sram_pool;
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struct pruss_mem_region msmcram;
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struct device_node *eth_node[PRUETH_NUM_MACS];
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struct prueth_emac *emac[PRUETH_NUM_MACS];
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struct net_device *registered_netdevs[PRUETH_NUM_MACS];
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struct regmap *miig_rt;
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struct regmap *mii_rt;
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struct regmap *pa_stats;
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enum pruss_pru_id pru_id[PRUSS_NUM_PRUS];
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struct platform_device *pdev;
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struct prueth_pdata pdata;
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u8 icssg_hwcmdseq;
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int emacs_initialized;
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struct icss_iep *iep0;
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struct icss_iep *iep1;
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struct prueth_vlan_tbl *vlan_tbl;
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struct net_device *hw_bridge_dev;
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struct net_device *hsr_dev;
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u8 br_members;
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u8 hsr_members;
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struct notifier_block prueth_netdevice_nb;
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struct notifier_block prueth_switchdev_nb;
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struct notifier_block prueth_switchdev_bl_nb;
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bool is_switch_mode;
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bool is_hsr_offload_mode;
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bool is_switchmode_supported;
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unsigned char switch_id[MAX_PHYS_ITEM_ID_LEN];
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int default_vlan;
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/** @vtbl_lock: Lock for vtbl in shared memory */
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spinlock_t vtbl_lock;
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};
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struct emac_tx_ts_response {
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u32 reserved[2];
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u32 cookie;
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u32 lo_ts;
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u32 hi_ts;
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};
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struct emac_tx_ts_response_sr1 {
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__le32 lo_ts;
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__le32 hi_ts;
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__le32 reserved;
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__le32 cookie;
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};
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/* get PRUSS SLICE number from prueth_emac */
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static inline int prueth_emac_slice(struct prueth_emac *emac)
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{
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switch (emac->port_id) {
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case PRUETH_PORT_MII0:
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return ICSS_SLICE0;
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case PRUETH_PORT_MII1:
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return ICSS_SLICE1;
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default:
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return -EINVAL;
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}
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}
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extern const struct ethtool_ops icssg_ethtool_ops;
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extern const struct dev_pm_ops prueth_dev_pm_ops;
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static inline u64 icssg_read_time(const void __iomem *addr)
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{
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u32 low, high;
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do {
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high = readl(addr + 4);
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low = readl(addr);
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} while (high != readl(addr + 4));
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return low + ((u64)high << 32);
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}
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/* Classifier helpers */
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void icssg_class_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac);
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void icssg_class_set_host_mac_addr(struct regmap *miig_rt, const u8 *mac);
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void icssg_class_disable(struct regmap *miig_rt, int slice);
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void icssg_class_default(struct regmap *miig_rt, int slice, bool allmulti,
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bool is_sr1);
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void icssg_class_promiscuous_sr1(struct regmap *miig_rt, int slice);
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void icssg_class_add_mcast_sr1(struct regmap *miig_rt, int slice,
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struct net_device *ndev);
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void icssg_ft1_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac_addr);
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||
|
|
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||
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/* config helpers */
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||
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void icssg_config_ipg(struct prueth_emac *emac);
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int icssg_config(struct prueth *prueth, struct prueth_emac *emac,
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||
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int slice);
|
||
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int icssg_set_port_state(struct prueth_emac *emac,
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||
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enum icssg_port_state_cmd state);
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||
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void icssg_config_set_speed(struct prueth_emac *emac);
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||
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void icssg_config_half_duplex(struct prueth_emac *emac);
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||
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|
void icssg_init_emac_mode(struct prueth *prueth);
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||
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void icssg_init_fw_offload_mode(struct prueth *prueth);
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||
|
|
|
||
|
|
/* Buffer queue helpers */
|
||
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int icssg_queue_pop(struct prueth *prueth, u8 queue);
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||
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void icssg_queue_push(struct prueth *prueth, int queue, u16 addr);
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|
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u32 icssg_queue_level(struct prueth *prueth, int queue);
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||
|
|
|
||
|
|
int icssg_send_fdb_msg(struct prueth_emac *emac, struct mgmt_cmd *cmd,
|
||
|
|
struct mgmt_cmd_rsp *rsp);
|
||
|
|
int icssg_fdb_add_del(struct prueth_emac *emac, const unsigned char *addr,
|
||
|
|
u8 vid, u8 fid_c2, bool add);
|
||
|
|
int icssg_fdb_lookup(struct prueth_emac *emac, const unsigned char *addr,
|
||
|
|
u8 vid);
|
||
|
|
void icssg_vtbl_modify(struct prueth_emac *emac, u8 vid, u8 port_mask,
|
||
|
|
u8 untag_mask, bool add);
|
||
|
|
u16 icssg_get_pvid(struct prueth_emac *emac);
|
||
|
|
void icssg_set_pvid(struct prueth *prueth, u8 vid, u8 port);
|
||
|
|
int emac_fdb_flow_id_updated(struct prueth_emac *emac);
|
||
|
|
#define prueth_napi_to_tx_chn(pnapi) \
|
||
|
|
container_of(pnapi, struct prueth_tx_chn, napi_tx)
|
||
|
|
|
||
|
|
void icssg_stats_work_handler(struct work_struct *work);
|
||
|
|
void emac_update_hardware_stats(struct prueth_emac *emac);
|
||
|
|
int emac_get_stat_by_name(struct prueth_emac *emac, char *stat_name);
|
||
|
|
|
||
|
|
/* Common functions */
|
||
|
|
void prueth_cleanup_rx_chns(struct prueth_emac *emac,
|
||
|
|
struct prueth_rx_chn *rx_chn,
|
||
|
|
int max_rflows);
|
||
|
|
void prueth_cleanup_tx_chns(struct prueth_emac *emac);
|
||
|
|
void prueth_ndev_del_tx_napi(struct prueth_emac *emac, int num);
|
||
|
|
void prueth_xmit_free(struct prueth_tx_chn *tx_chn,
|
||
|
|
struct cppi5_host_desc_t *desc);
|
||
|
|
int emac_tx_complete_packets(struct prueth_emac *emac, int chn,
|
||
|
|
int budget, bool *tdown);
|
||
|
|
int prueth_ndev_add_tx_napi(struct prueth_emac *emac);
|
||
|
|
int prueth_init_tx_chns(struct prueth_emac *emac);
|
||
|
|
int prueth_init_rx_chns(struct prueth_emac *emac,
|
||
|
|
struct prueth_rx_chn *rx_chn,
|
||
|
|
char *name, u32 max_rflows,
|
||
|
|
u32 max_desc_num);
|
||
|
|
int prueth_dma_rx_push(struct prueth_emac *emac,
|
||
|
|
struct sk_buff *skb,
|
||
|
|
struct prueth_rx_chn *rx_chn);
|
||
|
|
void emac_rx_timestamp(struct prueth_emac *emac,
|
||
|
|
struct sk_buff *skb, u32 *psdata);
|
||
|
|
enum netdev_tx icssg_ndo_start_xmit(struct sk_buff *skb, struct net_device *ndev);
|
||
|
|
irqreturn_t prueth_rx_irq(int irq, void *dev_id);
|
||
|
|
void prueth_cleanup_tx_ts(struct prueth_emac *emac);
|
||
|
|
int icssg_napi_rx_poll(struct napi_struct *napi_rx, int budget);
|
||
|
|
int prueth_prepare_rx_chan(struct prueth_emac *emac,
|
||
|
|
struct prueth_rx_chn *chn,
|
||
|
|
int buf_size);
|
||
|
|
void prueth_reset_tx_chan(struct prueth_emac *emac, int ch_num,
|
||
|
|
bool free_skb);
|
||
|
|
void prueth_reset_rx_chan(struct prueth_rx_chn *chn,
|
||
|
|
int num_flows, bool disable);
|
||
|
|
void icssg_ndo_tx_timeout(struct net_device *ndev, unsigned int txqueue);
|
||
|
|
int icssg_ndo_ioctl(struct net_device *ndev, struct ifreq *ifr, int cmd);
|
||
|
|
void icssg_ndo_get_stats64(struct net_device *ndev,
|
||
|
|
struct rtnl_link_stats64 *stats);
|
||
|
|
int icssg_ndo_get_phys_port_name(struct net_device *ndev, char *name,
|
||
|
|
size_t len);
|
||
|
|
int prueth_node_port(struct device_node *eth_node);
|
||
|
|
int prueth_node_mac(struct device_node *eth_node);
|
||
|
|
void prueth_netdev_exit(struct prueth *prueth,
|
||
|
|
struct device_node *eth_node);
|
||
|
|
int prueth_get_cores(struct prueth *prueth, int slice, bool is_sr1);
|
||
|
|
void prueth_put_cores(struct prueth *prueth, int slice);
|
||
|
|
|
||
|
|
/* Revision specific helper */
|
||
|
|
u64 icssg_ts_to_ns(u32 hi_sw, u32 hi, u32 lo, u32 cycle_time_ns);
|
||
|
|
|
||
|
|
#endif /* __NET_TI_ICSSG_PRUETH_H */
|