730 lines
18 KiB
C
730 lines
18 KiB
C
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// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2022 Intel Corporation
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*/
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#include "xe_query.h"
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#include <linux/nospec.h>
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#include <linux/sched/clock.h>
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#include <drm/ttm/ttm_placement.h>
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#include <generated/xe_wa_oob.h>
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#include <uapi/drm/xe_drm.h>
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#include "regs/xe_engine_regs.h"
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#include "regs/xe_gt_regs.h"
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#include "xe_bo.h"
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#include "xe_device.h"
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#include "xe_exec_queue.h"
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#include "xe_force_wake.h"
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#include "xe_ggtt.h"
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#include "xe_gt.h"
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#include "xe_guc_hwconfig.h"
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#include "xe_macros.h"
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#include "xe_mmio.h"
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#include "xe_ttm_vram_mgr.h"
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#include "xe_wa.h"
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static const u16 xe_to_user_engine_class[] = {
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[XE_ENGINE_CLASS_RENDER] = DRM_XE_ENGINE_CLASS_RENDER,
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[XE_ENGINE_CLASS_COPY] = DRM_XE_ENGINE_CLASS_COPY,
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[XE_ENGINE_CLASS_VIDEO_DECODE] = DRM_XE_ENGINE_CLASS_VIDEO_DECODE,
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[XE_ENGINE_CLASS_VIDEO_ENHANCE] = DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE,
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[XE_ENGINE_CLASS_COMPUTE] = DRM_XE_ENGINE_CLASS_COMPUTE,
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};
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static const enum xe_engine_class user_to_xe_engine_class[] = {
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[DRM_XE_ENGINE_CLASS_RENDER] = XE_ENGINE_CLASS_RENDER,
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[DRM_XE_ENGINE_CLASS_COPY] = XE_ENGINE_CLASS_COPY,
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[DRM_XE_ENGINE_CLASS_VIDEO_DECODE] = XE_ENGINE_CLASS_VIDEO_DECODE,
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[DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE] = XE_ENGINE_CLASS_VIDEO_ENHANCE,
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[DRM_XE_ENGINE_CLASS_COMPUTE] = XE_ENGINE_CLASS_COMPUTE,
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};
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static size_t calc_hw_engine_info_size(struct xe_device *xe)
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{
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struct xe_hw_engine *hwe;
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enum xe_hw_engine_id id;
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struct xe_gt *gt;
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u8 gt_id;
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int i = 0;
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for_each_gt(gt, xe, gt_id)
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for_each_hw_engine(hwe, gt, id) {
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if (xe_hw_engine_is_reserved(hwe))
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continue;
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i++;
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}
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return sizeof(struct drm_xe_query_engines) +
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i * sizeof(struct drm_xe_engine);
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}
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typedef u64 (*__ktime_func_t)(void);
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static __ktime_func_t __clock_id_to_func(clockid_t clk_id)
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{
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/*
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* Use logic same as the perf subsystem to allow user to select the
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* reference clock id to be used for timestamps.
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*/
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switch (clk_id) {
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case CLOCK_MONOTONIC:
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return &ktime_get_ns;
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case CLOCK_MONOTONIC_RAW:
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return &ktime_get_raw_ns;
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case CLOCK_REALTIME:
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return &ktime_get_real_ns;
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case CLOCK_BOOTTIME:
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return &ktime_get_boottime_ns;
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case CLOCK_TAI:
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return &ktime_get_clocktai_ns;
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default:
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return NULL;
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}
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}
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static void
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hwe_read_timestamp(struct xe_hw_engine *hwe, u64 *engine_ts, u64 *cpu_ts,
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u64 *cpu_delta, __ktime_func_t cpu_clock)
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{
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struct xe_mmio *mmio = &hwe->gt->mmio;
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u32 upper, lower, old_upper, loop = 0;
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struct xe_reg upper_reg = RING_TIMESTAMP_UDW(hwe->mmio_base),
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lower_reg = RING_TIMESTAMP(hwe->mmio_base);
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upper = xe_mmio_read32(mmio, upper_reg);
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do {
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*cpu_delta = local_clock();
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*cpu_ts = cpu_clock();
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lower = xe_mmio_read32(mmio, lower_reg);
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*cpu_delta = local_clock() - *cpu_delta;
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old_upper = upper;
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upper = xe_mmio_read32(mmio, upper_reg);
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} while (upper != old_upper && loop++ < 2);
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*engine_ts = (u64)upper << 32 | lower;
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}
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static int
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query_engine_cycles(struct xe_device *xe,
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struct drm_xe_device_query *query)
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{
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struct drm_xe_query_engine_cycles __user *query_ptr;
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struct drm_xe_engine_class_instance *eci;
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struct drm_xe_query_engine_cycles resp;
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size_t size = sizeof(resp);
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__ktime_func_t cpu_clock;
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struct xe_hw_engine *hwe;
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struct xe_gt *gt;
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unsigned int fw_ref;
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if (query->size == 0) {
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query->size = size;
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return 0;
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} else if (XE_IOCTL_DBG(xe, query->size != size)) {
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return -EINVAL;
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}
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query_ptr = u64_to_user_ptr(query->data);
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if (copy_from_user(&resp, query_ptr, size))
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return -EFAULT;
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cpu_clock = __clock_id_to_func(resp.clockid);
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if (!cpu_clock)
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return -EINVAL;
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eci = &resp.eci;
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if (eci->gt_id >= XE_MAX_GT_PER_TILE)
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return -EINVAL;
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gt = xe_device_get_gt(xe, eci->gt_id);
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if (!gt)
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return -EINVAL;
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if (eci->engine_class >= ARRAY_SIZE(user_to_xe_engine_class))
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return -EINVAL;
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hwe = xe_gt_hw_engine(gt, user_to_xe_engine_class[eci->engine_class],
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eci->engine_instance, true);
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if (!hwe)
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return -EINVAL;
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fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
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if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL)) {
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xe_force_wake_put(gt_to_fw(gt), fw_ref);
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return -EIO;
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}
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hwe_read_timestamp(hwe, &resp.engine_cycles, &resp.cpu_timestamp,
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&resp.cpu_delta, cpu_clock);
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xe_force_wake_put(gt_to_fw(gt), fw_ref);
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if (GRAPHICS_VER(xe) >= 20)
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resp.width = 64;
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else
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resp.width = 36;
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/* Only write to the output fields of user query */
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if (put_user(resp.cpu_timestamp, &query_ptr->cpu_timestamp) ||
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put_user(resp.cpu_delta, &query_ptr->cpu_delta) ||
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put_user(resp.engine_cycles, &query_ptr->engine_cycles) ||
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put_user(resp.width, &query_ptr->width))
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return -EFAULT;
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return 0;
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}
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static int query_engines(struct xe_device *xe,
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struct drm_xe_device_query *query)
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{
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size_t size = calc_hw_engine_info_size(xe);
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struct drm_xe_query_engines __user *query_ptr =
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u64_to_user_ptr(query->data);
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struct drm_xe_query_engines *engines;
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struct xe_hw_engine *hwe;
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enum xe_hw_engine_id id;
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struct xe_gt *gt;
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u8 gt_id;
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int i = 0;
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if (query->size == 0) {
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query->size = size;
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return 0;
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} else if (XE_IOCTL_DBG(xe, query->size != size)) {
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return -EINVAL;
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}
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engines = kzalloc(size, GFP_KERNEL);
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if (!engines)
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return -ENOMEM;
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for_each_gt(gt, xe, gt_id)
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for_each_hw_engine(hwe, gt, id) {
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if (xe_hw_engine_is_reserved(hwe))
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continue;
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engines->engines[i].instance.engine_class =
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xe_to_user_engine_class[hwe->class];
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engines->engines[i].instance.engine_instance =
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hwe->logical_instance;
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engines->engines[i].instance.gt_id = gt->info.id;
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i++;
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}
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engines->num_engines = i;
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if (copy_to_user(query_ptr, engines, size)) {
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kfree(engines);
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return -EFAULT;
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}
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kfree(engines);
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return 0;
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}
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static size_t calc_mem_regions_size(struct xe_device *xe)
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{
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u32 num_managers = 1;
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int i;
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for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i)
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if (ttm_manager_type(&xe->ttm, i))
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num_managers++;
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return offsetof(struct drm_xe_query_mem_regions, mem_regions[num_managers]);
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}
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static int query_mem_regions(struct xe_device *xe,
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struct drm_xe_device_query *query)
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{
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size_t size = calc_mem_regions_size(xe);
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struct drm_xe_query_mem_regions *mem_regions;
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struct drm_xe_query_mem_regions __user *query_ptr =
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u64_to_user_ptr(query->data);
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struct ttm_resource_manager *man;
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int ret, i;
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if (query->size == 0) {
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query->size = size;
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return 0;
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} else if (XE_IOCTL_DBG(xe, query->size != size)) {
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return -EINVAL;
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}
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mem_regions = kzalloc(size, GFP_KERNEL);
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if (XE_IOCTL_DBG(xe, !mem_regions))
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return -ENOMEM;
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man = ttm_manager_type(&xe->ttm, XE_PL_TT);
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mem_regions->mem_regions[0].mem_class = DRM_XE_MEM_REGION_CLASS_SYSMEM;
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/*
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* The instance needs to be a unique number that represents the index
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* in the placement mask used at xe_gem_create_ioctl() for the
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* xe_bo_create() placement.
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*/
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mem_regions->mem_regions[0].instance = 0;
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mem_regions->mem_regions[0].min_page_size = PAGE_SIZE;
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mem_regions->mem_regions[0].total_size = man->size << PAGE_SHIFT;
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if (perfmon_capable())
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mem_regions->mem_regions[0].used = ttm_resource_manager_usage(man);
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mem_regions->num_mem_regions = 1;
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for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i) {
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man = ttm_manager_type(&xe->ttm, i);
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if (man) {
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mem_regions->mem_regions[mem_regions->num_mem_regions].mem_class =
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DRM_XE_MEM_REGION_CLASS_VRAM;
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mem_regions->mem_regions[mem_regions->num_mem_regions].instance =
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mem_regions->num_mem_regions;
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mem_regions->mem_regions[mem_regions->num_mem_regions].min_page_size =
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xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ?
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SZ_64K : PAGE_SIZE;
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mem_regions->mem_regions[mem_regions->num_mem_regions].total_size =
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man->size;
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if (perfmon_capable()) {
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xe_ttm_vram_get_used(man,
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&mem_regions->mem_regions
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[mem_regions->num_mem_regions].used,
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&mem_regions->mem_regions
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[mem_regions->num_mem_regions].cpu_visible_used);
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}
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mem_regions->mem_regions[mem_regions->num_mem_regions].cpu_visible_size =
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xe_ttm_vram_get_cpu_visible_size(man);
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mem_regions->num_mem_regions++;
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}
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}
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if (!copy_to_user(query_ptr, mem_regions, size))
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ret = 0;
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else
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ret = -ENOSPC;
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kfree(mem_regions);
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return ret;
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}
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static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
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{
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const u32 num_params = DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1;
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size_t size =
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sizeof(struct drm_xe_query_config) + num_params * sizeof(u64);
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struct drm_xe_query_config __user *query_ptr =
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u64_to_user_ptr(query->data);
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struct drm_xe_query_config *config;
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if (query->size == 0) {
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query->size = size;
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return 0;
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} else if (XE_IOCTL_DBG(xe, query->size != size)) {
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return -EINVAL;
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}
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config = kzalloc(size, GFP_KERNEL);
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if (!config)
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return -ENOMEM;
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config->num_params = num_params;
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config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] =
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xe->info.devid | (xe->info.revid << 16);
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if (xe_device_get_root_tile(xe)->mem.vram.usable_size)
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config->info[DRM_XE_QUERY_CONFIG_FLAGS] =
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DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM;
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config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] =
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xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
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config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
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config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =
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xe_exec_queue_device_get_max_priority(xe);
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if (copy_to_user(query_ptr, config, size)) {
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kfree(config);
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return -EFAULT;
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}
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kfree(config);
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return 0;
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}
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static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query)
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{
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struct xe_gt *gt;
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size_t size = sizeof(struct drm_xe_query_gt_list) +
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xe->info.gt_count * sizeof(struct drm_xe_gt);
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struct drm_xe_query_gt_list __user *query_ptr =
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u64_to_user_ptr(query->data);
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struct drm_xe_query_gt_list *gt_list;
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u8 id;
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if (query->size == 0) {
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query->size = size;
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return 0;
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} else if (XE_IOCTL_DBG(xe, query->size != size)) {
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return -EINVAL;
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}
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gt_list = kzalloc(size, GFP_KERNEL);
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if (!gt_list)
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return -ENOMEM;
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gt_list->num_gt = xe->info.gt_count;
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for_each_gt(gt, xe, id) {
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if (xe_gt_is_media_type(gt))
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gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MEDIA;
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else
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gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;
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gt_list->gt_list[id].tile_id = gt_to_tile(gt)->id;
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gt_list->gt_list[id].gt_id = gt->info.id;
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gt_list->gt_list[id].reference_clock = gt->info.reference_clock;
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/*
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* The mem_regions indexes in the mask below need to
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* directly identify the struct
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* drm_xe_query_mem_regions' instance constructed at
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* query_mem_regions()
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*
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* For our current platforms:
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* Bit 0 -> System Memory
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* Bit 1 -> VRAM0 on Tile0
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* Bit 2 -> VRAM1 on Tile1
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* However the uAPI is generic and it's userspace's
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* responsibility to check the mem_class, without any
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* assumption.
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*/
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if (!IS_DGFX(xe))
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||
|
gt_list->gt_list[id].near_mem_regions = 0x1;
|
||
|
else
|
||
|
gt_list->gt_list[id].near_mem_regions =
|
||
|
BIT(gt_to_tile(gt)->id) << 1;
|
||
|
gt_list->gt_list[id].far_mem_regions = xe->info.mem_region_mask ^
|
||
|
gt_list->gt_list[id].near_mem_regions;
|
||
|
|
||
|
gt_list->gt_list[id].ip_ver_major =
|
||
|
REG_FIELD_GET(GMD_ID_ARCH_MASK, gt->info.gmdid);
|
||
|
gt_list->gt_list[id].ip_ver_minor =
|
||
|
REG_FIELD_GET(GMD_ID_RELEASE_MASK, gt->info.gmdid);
|
||
|
gt_list->gt_list[id].ip_ver_rev =
|
||
|
REG_FIELD_GET(GMD_ID_REVID, gt->info.gmdid);
|
||
|
}
|
||
|
|
||
|
if (copy_to_user(query_ptr, gt_list, size)) {
|
||
|
kfree(gt_list);
|
||
|
return -EFAULT;
|
||
|
}
|
||
|
kfree(gt_list);
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static int query_hwconfig(struct xe_device *xe,
|
||
|
struct drm_xe_device_query *query)
|
||
|
{
|
||
|
struct xe_gt *gt = xe_root_mmio_gt(xe);
|
||
|
size_t size = xe_guc_hwconfig_size(>->uc.guc);
|
||
|
void __user *query_ptr = u64_to_user_ptr(query->data);
|
||
|
void *hwconfig;
|
||
|
|
||
|
if (query->size == 0) {
|
||
|
query->size = size;
|
||
|
return 0;
|
||
|
} else if (XE_IOCTL_DBG(xe, query->size != size)) {
|
||
|
return -EINVAL;
|
||
|
}
|
||
|
|
||
|
hwconfig = kzalloc(size, GFP_KERNEL);
|
||
|
if (!hwconfig)
|
||
|
return -ENOMEM;
|
||
|
|
||
|
xe_guc_hwconfig_copy(>->uc.guc, hwconfig);
|
||
|
|
||
|
if (copy_to_user(query_ptr, hwconfig, size)) {
|
||
|
kfree(hwconfig);
|
||
|
return -EFAULT;
|
||
|
}
|
||
|
kfree(hwconfig);
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static size_t calc_topo_query_size(struct xe_device *xe)
|
||
|
{
|
||
|
struct xe_gt *gt;
|
||
|
size_t query_size = 0;
|
||
|
int id;
|
||
|
|
||
|
for_each_gt(gt, xe, id) {
|
||
|
query_size += 3 * sizeof(struct drm_xe_query_topology_mask) +
|
||
|
sizeof_field(struct xe_gt, fuse_topo.g_dss_mask) +
|
||
|
sizeof_field(struct xe_gt, fuse_topo.c_dss_mask) +
|
||
|
sizeof_field(struct xe_gt, fuse_topo.eu_mask_per_dss);
|
||
|
|
||
|
/* L3bank mask may not be available for some GTs */
|
||
|
if (!XE_WA(gt, no_media_l3))
|
||
|
query_size += sizeof(struct drm_xe_query_topology_mask) +
|
||
|
sizeof_field(struct xe_gt, fuse_topo.l3_bank_mask);
|
||
|
}
|
||
|
|
||
|
return query_size;
|
||
|
}
|
||
|
|
||
|
static int copy_mask(void __user **ptr,
|
||
|
struct drm_xe_query_topology_mask *topo,
|
||
|
void *mask, size_t mask_size)
|
||
|
{
|
||
|
topo->num_bytes = mask_size;
|
||
|
|
||
|
if (copy_to_user(*ptr, topo, sizeof(*topo)))
|
||
|
return -EFAULT;
|
||
|
*ptr += sizeof(topo);
|
||
|
|
||
|
if (copy_to_user(*ptr, mask, mask_size))
|
||
|
return -EFAULT;
|
||
|
*ptr += mask_size;
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static int query_gt_topology(struct xe_device *xe,
|
||
|
struct drm_xe_device_query *query)
|
||
|
{
|
||
|
void __user *query_ptr = u64_to_user_ptr(query->data);
|
||
|
size_t size = calc_topo_query_size(xe);
|
||
|
struct drm_xe_query_topology_mask topo;
|
||
|
struct xe_gt *gt;
|
||
|
int id;
|
||
|
|
||
|
if (query->size == 0) {
|
||
|
query->size = size;
|
||
|
return 0;
|
||
|
} else if (XE_IOCTL_DBG(xe, query->size != size)) {
|
||
|
return -EINVAL;
|
||
|
}
|
||
|
|
||
|
for_each_gt(gt, xe, id) {
|
||
|
int err;
|
||
|
|
||
|
topo.gt_id = id;
|
||
|
|
||
|
topo.type = DRM_XE_TOPO_DSS_GEOMETRY;
|
||
|
err = copy_mask(&query_ptr, &topo, gt->fuse_topo.g_dss_mask,
|
||
|
sizeof(gt->fuse_topo.g_dss_mask));
|
||
|
if (err)
|
||
|
return err;
|
||
|
|
||
|
topo.type = DRM_XE_TOPO_DSS_COMPUTE;
|
||
|
err = copy_mask(&query_ptr, &topo, gt->fuse_topo.c_dss_mask,
|
||
|
sizeof(gt->fuse_topo.c_dss_mask));
|
||
|
if (err)
|
||
|
return err;
|
||
|
|
||
|
/*
|
||
|
* If the kernel doesn't have a way to obtain a correct L3bank
|
||
|
* mask, then it's better to omit L3 from the query rather than
|
||
|
* reporting bogus or zeroed information to userspace.
|
||
|
*/
|
||
|
if (!XE_WA(gt, no_media_l3)) {
|
||
|
topo.type = DRM_XE_TOPO_L3_BANK;
|
||
|
err = copy_mask(&query_ptr, &topo, gt->fuse_topo.l3_bank_mask,
|
||
|
sizeof(gt->fuse_topo.l3_bank_mask));
|
||
|
if (err)
|
||
|
return err;
|
||
|
}
|
||
|
|
||
|
topo.type = gt->fuse_topo.eu_type == XE_GT_EU_TYPE_SIMD16 ?
|
||
|
DRM_XE_TOPO_SIMD16_EU_PER_DSS :
|
||
|
DRM_XE_TOPO_EU_PER_DSS;
|
||
|
err = copy_mask(&query_ptr, &topo,
|
||
|
gt->fuse_topo.eu_mask_per_dss,
|
||
|
sizeof(gt->fuse_topo.eu_mask_per_dss));
|
||
|
if (err)
|
||
|
return err;
|
||
|
}
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query)
|
||
|
{
|
||
|
struct drm_xe_query_uc_fw_version __user *query_ptr = u64_to_user_ptr(query->data);
|
||
|
size_t size = sizeof(struct drm_xe_query_uc_fw_version);
|
||
|
struct drm_xe_query_uc_fw_version resp;
|
||
|
struct xe_uc_fw_version *version = NULL;
|
||
|
|
||
|
if (query->size == 0) {
|
||
|
query->size = size;
|
||
|
return 0;
|
||
|
} else if (XE_IOCTL_DBG(xe, query->size != size)) {
|
||
|
return -EINVAL;
|
||
|
}
|
||
|
|
||
|
if (copy_from_user(&resp, query_ptr, size))
|
||
|
return -EFAULT;
|
||
|
|
||
|
if (XE_IOCTL_DBG(xe, resp.pad || resp.pad2 || resp.reserved))
|
||
|
return -EINVAL;
|
||
|
|
||
|
switch (resp.uc_type) {
|
||
|
case XE_QUERY_UC_TYPE_GUC_SUBMISSION: {
|
||
|
struct xe_guc *guc = &xe->tiles[0].primary_gt->uc.guc;
|
||
|
|
||
|
version = &guc->fw.versions.found[XE_UC_FW_VER_COMPATIBILITY];
|
||
|
break;
|
||
|
}
|
||
|
case XE_QUERY_UC_TYPE_HUC: {
|
||
|
struct xe_gt *media_gt = NULL;
|
||
|
struct xe_huc *huc;
|
||
|
|
||
|
if (MEDIA_VER(xe) >= 13) {
|
||
|
struct xe_tile *tile;
|
||
|
u8 gt_id;
|
||
|
|
||
|
for_each_tile(tile, xe, gt_id) {
|
||
|
if (tile->media_gt) {
|
||
|
media_gt = tile->media_gt;
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
} else {
|
||
|
media_gt = xe->tiles[0].primary_gt;
|
||
|
}
|
||
|
|
||
|
if (!media_gt)
|
||
|
break;
|
||
|
|
||
|
huc = &media_gt->uc.huc;
|
||
|
if (huc->fw.status == XE_UC_FIRMWARE_RUNNING)
|
||
|
version = &huc->fw.versions.found[XE_UC_FW_VER_RELEASE];
|
||
|
break;
|
||
|
}
|
||
|
default:
|
||
|
return -EINVAL;
|
||
|
}
|
||
|
|
||
|
if (version) {
|
||
|
resp.branch_ver = 0;
|
||
|
resp.major_ver = version->major;
|
||
|
resp.minor_ver = version->minor;
|
||
|
resp.patch_ver = version->patch;
|
||
|
} else {
|
||
|
return -ENODEV;
|
||
|
}
|
||
|
|
||
|
if (copy_to_user(query_ptr, &resp, size))
|
||
|
return -EFAULT;
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static size_t calc_oa_unit_query_size(struct xe_device *xe)
|
||
|
{
|
||
|
size_t size = sizeof(struct drm_xe_query_oa_units);
|
||
|
struct xe_gt *gt;
|
||
|
int i, id;
|
||
|
|
||
|
for_each_gt(gt, xe, id) {
|
||
|
for (i = 0; i < gt->oa.num_oa_units; i++) {
|
||
|
size += sizeof(struct drm_xe_oa_unit);
|
||
|
size += gt->oa.oa_unit[i].num_engines *
|
||
|
sizeof(struct drm_xe_engine_class_instance);
|
||
|
}
|
||
|
}
|
||
|
|
||
|
return size;
|
||
|
}
|
||
|
|
||
|
static int query_oa_units(struct xe_device *xe,
|
||
|
struct drm_xe_device_query *query)
|
||
|
{
|
||
|
void __user *query_ptr = u64_to_user_ptr(query->data);
|
||
|
size_t size = calc_oa_unit_query_size(xe);
|
||
|
struct drm_xe_query_oa_units *qoa;
|
||
|
enum xe_hw_engine_id hwe_id;
|
||
|
struct drm_xe_oa_unit *du;
|
||
|
struct xe_hw_engine *hwe;
|
||
|
struct xe_oa_unit *u;
|
||
|
int gt_id, i, j, ret;
|
||
|
struct xe_gt *gt;
|
||
|
u8 *pdu;
|
||
|
|
||
|
if (query->size == 0) {
|
||
|
query->size = size;
|
||
|
return 0;
|
||
|
} else if (XE_IOCTL_DBG(xe, query->size != size)) {
|
||
|
return -EINVAL;
|
||
|
}
|
||
|
|
||
|
qoa = kzalloc(size, GFP_KERNEL);
|
||
|
if (!qoa)
|
||
|
return -ENOMEM;
|
||
|
|
||
|
pdu = (u8 *)&qoa->oa_units[0];
|
||
|
for_each_gt(gt, xe, gt_id) {
|
||
|
for (i = 0; i < gt->oa.num_oa_units; i++) {
|
||
|
u = >->oa.oa_unit[i];
|
||
|
du = (struct drm_xe_oa_unit *)pdu;
|
||
|
|
||
|
du->oa_unit_id = u->oa_unit_id;
|
||
|
du->oa_unit_type = u->type;
|
||
|
du->oa_timestamp_freq = xe_oa_timestamp_frequency(gt);
|
||
|
du->capabilities = DRM_XE_OA_CAPS_BASE | DRM_XE_OA_CAPS_SYNCS;
|
||
|
|
||
|
j = 0;
|
||
|
for_each_hw_engine(hwe, gt, hwe_id) {
|
||
|
if (!xe_hw_engine_is_reserved(hwe) &&
|
||
|
xe_oa_unit_id(hwe) == u->oa_unit_id) {
|
||
|
du->eci[j].engine_class =
|
||
|
xe_to_user_engine_class[hwe->class];
|
||
|
du->eci[j].engine_instance = hwe->logical_instance;
|
||
|
du->eci[j].gt_id = gt->info.id;
|
||
|
j++;
|
||
|
}
|
||
|
}
|
||
|
du->num_engines = j;
|
||
|
pdu += sizeof(*du) + j * sizeof(du->eci[0]);
|
||
|
qoa->num_oa_units++;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
ret = copy_to_user(query_ptr, qoa, size);
|
||
|
kfree(qoa);
|
||
|
|
||
|
return ret ? -EFAULT : 0;
|
||
|
}
|
||
|
|
||
|
static int (* const xe_query_funcs[])(struct xe_device *xe,
|
||
|
struct drm_xe_device_query *query) = {
|
||
|
query_engines,
|
||
|
query_mem_regions,
|
||
|
query_config,
|
||
|
query_gt_list,
|
||
|
query_hwconfig,
|
||
|
query_gt_topology,
|
||
|
query_engine_cycles,
|
||
|
query_uc_fw_version,
|
||
|
query_oa_units,
|
||
|
};
|
||
|
|
||
|
int xe_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
|
||
|
{
|
||
|
struct xe_device *xe = to_xe_device(dev);
|
||
|
struct drm_xe_device_query *query = data;
|
||
|
u32 idx;
|
||
|
|
||
|
if (XE_IOCTL_DBG(xe, query->extensions) ||
|
||
|
XE_IOCTL_DBG(xe, query->reserved[0] || query->reserved[1]))
|
||
|
return -EINVAL;
|
||
|
|
||
|
if (XE_IOCTL_DBG(xe, query->query >= ARRAY_SIZE(xe_query_funcs)))
|
||
|
return -EINVAL;
|
||
|
|
||
|
idx = array_index_nospec(query->query, ARRAY_SIZE(xe_query_funcs));
|
||
|
if (XE_IOCTL_DBG(xe, !xe_query_funcs[idx]))
|
||
|
return -EINVAL;
|
||
|
|
||
|
return xe_query_funcs[idx](xe, query);
|
||
|
}
|