529 lines
11 KiB
Plaintext
529 lines
11 KiB
Plaintext
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// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
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/*
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* Device tree for the WolfVision PF5 mainboard.
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*
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* Copyright (C) 2024 WolfVision GmbH.
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include <dt-bindings/regulator/ti,tps62864.h>
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#include <dt-bindings/soc/rockchip,vop2.h>
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#include "rk3568.dtsi"
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/ {
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model = "WolfVision PF5";
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compatible = "wolfvision,rk3568-pf5", "rockchip,rk3568";
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aliases {
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ethernet0 = &gmac0;
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mmc0 = &sdhci;
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rtc0 = &pcf85623;
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rtc1 = &rk809;
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};
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chosen: chosen {
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stdout-path = "serial2:115200n8";
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};
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hdmi_tx: hdmi-tx-connector {
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compatible = "hdmi-connector";
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hdmi-pwr-supply = <&hdmi_tx_5v>;
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type = "a";
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port {
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hdmi_tx_in: endpoint {
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remote-endpoint = <&hdmi_tx_out>;
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};
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};
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};
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hdmi_tx_5v: regulator-hdmi-tx-5v {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&hdmi_tx_5v_en>;
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regulator-name = "hdmi_tx_5v";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc5v_in>;
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};
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pdm_codec: pdm-codec {
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compatible = "dmic-codec";
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num-channels = <1>;
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#sound-dai-cells = <0>;
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};
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pdm_sound: pdm-sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "microphone";
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simple-audio-card,cpu {
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sound-dai = <&pdm>;
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};
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simple-audio-card,codec {
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sound-dai = <&pdm_codec>;
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};
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};
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vcc12v_cam: regulator-vcc12v-cam {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc12v_cam_en>;
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regulator-name = "12v_cam";
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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vin-supply = <&vcc12v_in>;
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};
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vcc12v_in: regulator-vcc12v-in {
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compatible = "regulator-fixed";
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regulator-name = "12v_in";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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};
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vcc3v8_cam: regulator-vcc3v8-cam {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc3v8_cam_en>;
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regulator-name = "3v8_cam";
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regulator-min-microvolt = <3800000>;
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regulator-max-microvolt = <3800000>;
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vin-supply = <&vcc5v_in>;
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};
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vcc3v3_sys: regulator-vcc3v3-sys {
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compatible = "regulator-fixed";
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regulator-name = "3v3_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc5v_in>;
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};
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vcc5v_in: regulator-vcc5v-in {
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compatible = "regulator-fixed";
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regulator-name = "5v_in";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc12v_in>;
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};
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};
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&combphy0 {
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status = "okay";
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};
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&cpu0 {
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cpu-supply = <&vcc0v9_cpu>;
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};
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&cpu1 {
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cpu-supply = <&vcc0v9_cpu>;
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};
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&cpu2 {
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cpu-supply = <&vcc0v9_cpu>;
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};
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&cpu3 {
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cpu-supply = <&vcc0v9_cpu>;
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};
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&gpu {
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mali-supply = <&vcc0v9_gpu>;
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status = "okay";
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};
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&hdmi {
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avdd-0v9-supply = <&vcc0v9a_image>;
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avdd-1v8-supply = <&vcc1v8a_image>;
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status = "okay";
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};
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&hdmi_in {
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hdmi_in_vp0: endpoint {
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remote-endpoint = <&vp0_out_hdmi>;
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};
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};
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&hdmi_out {
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hdmi_tx_out: endpoint {
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remote-endpoint = <&hdmi_tx_in>;
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};
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};
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&i2c0 {
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status = "okay";
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rk809: pmic@20 {
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compatible = "rockchip,rk809";
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reg = <0x20>;
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interrupt-parent = <&gpio0>;
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interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
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#clock-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_int_l>;
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system-power-controller;
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vcc1-supply = <&vcc5v_in>;
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vcc2-supply = <&vcc5v_in>;
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vcc3-supply = <&vcc5v_in>;
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vcc4-supply = <&vcc5v_in>;
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vcc5-supply = <&vcc3v3_sys>;
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vcc6-supply = <&vcc5v_in>;
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vcc7-supply = <&vcc3v3_sys>;
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vcc8-supply = <&vcc3v3_sys>;
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vcc9-supply = <&vcc3v3_sys>;
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wakeup-source;
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regulators {
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vcc0v9_logic: DCDC_REG1 {
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regulator-name = "0v9_logic";
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regulator-always-on;
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regulator-boot-on;
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regulator-initial-mode = <0x2>;
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc0v9_gpu: DCDC_REG2 {
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regulator-name = "0v9_gpu";
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regulator-always-on;
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regulator-initial-mode = <0x2>;
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc1v1_ddr4: DCDC_REG3 {
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regulator-name = "1v1_ddr4";
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regulator-always-on;
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regulator-boot-on;
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regulator-initial-mode = <0x2>;
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regulator-state-mem {
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regulator-on-in-suspend;
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};
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};
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vcc0v9_npu: DCDC_REG4 {
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regulator-name = "0v9_npu";
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regulator-always-on;
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regulator-initial-mode = <0x2>;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc1v8: DCDC_REG5 {
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regulator-name = "1v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc0v9a_image: LDO_REG1 {
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regulator-name = "0v9a_image";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc0v9a: LDO_REG2 {
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regulator-name = "0v9a";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc0v9a_pmu: LDO_REG3 {
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regulator-name = "0v9a_pmu";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <900000>;
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};
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};
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vcc3v3_acodec: LDO_REG4 {
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regulator-name = "3v3_acodec";
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc3v3_sd: LDO_REG5 {
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regulator-name = "3v3_sd";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc3v3_pmu: LDO_REG6 {
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regulator-name = "3v3_pmu";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <3300000>;
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};
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};
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vcc1v8a: LDO_REG7 {
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regulator-name = "1v8a";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc1v8a_pmu: LDO_REG8 {
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regulator-name = "1v8a_pmu";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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vcc1v8a_image: LDO_REG9 {
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regulator-name = "1v8a_image";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc3v3_sw: SWITCH_REG1 {
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regulator-name = "3v3_sw";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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};
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};
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regulator@42 {
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compatible = "ti,tps62869";
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reg = <0x42>;
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regulators {
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vcc0v9_cpu: SW {
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regulator-name = "0v9_cpu";
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regulator-always-on;
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||
|
|
regulator-boot-on;
|
||
|
|
regulator-initial-mode = <TPS62864_MODE_FPWM>;
|
||
|
|
regulator-min-microvolt = <900000>;
|
||
|
|
regulator-max-microvolt = <1150000>;
|
||
|
|
vin-supply = <&vcc5v_in>;
|
||
|
|
|
||
|
|
regulator-state-mem {
|
||
|
|
regulator-off-in-suspend;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
pcf85623: rtc@51 {
|
||
|
|
compatible = "nxp,pcf85263";
|
||
|
|
reg = <0x51>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&clk32k_in>;
|
||
|
|
quartz-load-femtofarads = <12500>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&i2c3 {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&i2c3m0_xfer>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&i2c4 {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&i2c4m1_xfer>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&pdm {
|
||
|
|
pinctrl-0 = <&pdmm0_clk
|
||
|
|
&pdmm0_sdi0>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&pinctrl {
|
||
|
|
cam {
|
||
|
|
vcc12v_cam_en: vcc12v-cam-en-pinctrl {
|
||
|
|
rockchip,pins = <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
|
};
|
||
|
|
|
||
|
|
vcc3v8_cam_en: vcc3v8-cam-en-pinctrl {
|
||
|
|
rockchip,pins = <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hdmitx {
|
||
|
|
hdmi_tx_5v_en: hdmi-tx-5v-en-pinctrl {
|
||
|
|
rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
pmic {
|
||
|
|
pmic_int_l: pmic-int-l-pinctrl {
|
||
|
|
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&pmu_io_domains {
|
||
|
|
pmuio1-supply = <&vcc3v3_pmu>;
|
||
|
|
pmuio2-supply = <&vcc3v3_pmu>;
|
||
|
|
vccio1-supply = <&vcc3v3_acodec>;
|
||
|
|
vccio2-supply = <&vcc1v8>;
|
||
|
|
vccio3-supply = <&vcc3v3_sd>;
|
||
|
|
vccio4-supply = <&vcc1v8>;
|
||
|
|
vccio5-supply = <&vcc1v8>;
|
||
|
|
vccio6-supply = <&vcc3v3_sw>;
|
||
|
|
vccio7-supply = <&vcc3v3_sw>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&saradc {
|
||
|
|
vref-supply = <&vcc1v8a>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&sdhci {
|
||
|
|
bus-width = <8>;
|
||
|
|
max-frequency = <200000000>;
|
||
|
|
non-removable;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
|
||
|
|
vmmc-supply = <&vcc3v3_sw>;
|
||
|
|
vqmmc-supply = <&vcc1v8>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&tsadc {
|
||
|
|
rockchip,hw-tshut-mode = <1>;
|
||
|
|
rockchip,hw-tshut-polarity = <0>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&uart2 {
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&usb_host0_xhci {
|
||
|
|
dr_mode = "peripheral";
|
||
|
|
/* The following quirks are required since the bInterval is 1 and we
|
||
|
|
* handle steady ISOC streaming. See Usecase 3 in commit 729dcffd1ed3
|
||
|
|
* ("usb: dwc3: gadget: Add support for disabling U1 and U2 entries").
|
||
|
|
*/
|
||
|
|
snps,dis-u1-entry-quirk;
|
||
|
|
snps,dis-u2-entry-quirk;
|
||
|
|
/*
|
||
|
|
* Without this quirk the available fifosize seems to be miscalculated
|
||
|
|
* in cases where many endpoints are used. In one particular situation
|
||
|
|
* 8 IN EPs and 3 OUT EPs where selected and lead to stalled transfers
|
||
|
|
* without the resize quirk.
|
||
|
|
*/
|
||
|
|
tx-fifo-resize;
|
||
|
|
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&usb2phy0 {
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&usb2phy0_otg {
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&vop {
|
||
|
|
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP2>;
|
||
|
|
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&vop_mmu {
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&vp0 {
|
||
|
|
vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
|
||
|
|
reg = <ROCKCHIP_VOP2_EP_HDMI0>;
|
||
|
|
remote-endpoint = <&hdmi_in_vp0>;
|
||
|
|
};
|
||
|
|
};
|