399 lines
11 KiB
Plaintext
399 lines
11 KiB
Plaintext
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2023 Emtop Embedded Solutions
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*
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* Author: Himanshu Bhavani <himanshu.bhavani@siliconsignals.io>
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* Author: Tarang Raval <tarang.raval@siliconsignals.io>
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*/
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/dts-v1/;
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#include "imx8mm-emtop-som.dtsi"
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/ {
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model = "Emtop Embedded Solutions i.MX8M Mini Baseboard V1";
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compatible = "ees,imx8mm-emtop-baseboard", "ees,imx8mm-emtop-som",
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"fsl,imx8mm";
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connector {
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compatible = "usb-c-connector";
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label = "USB-C";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb_otg>;
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id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
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port {
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high_speed_ep: endpoint {
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remote-endpoint = <&usb_hs_ep>;
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};
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_led>;
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led-1 {
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label = "buzzer";
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gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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};
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osc_can: clock-osc-can {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <16000000>;
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clock-output-names = "osc-can";
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};
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reg_audio: regulator-audio {
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compatible = "regulator-fixed";
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regulator-name = "wm8904_supply";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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reg_wifi_vmmc: regulator-wifi-vmmc {
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compatible = "regulator-fixed";
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regulator-name = "vmmc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio2 10 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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startup-delay-us = <100>;
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off-on-delay-us = <20000>;
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};
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sound-wm8904 {
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compatible = "simple-audio-card";
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simple-audio-card,bitclock-master = <&dailink_master>;
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simple-audio-card,format = "i2s";
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simple-audio-card,frame-master = <&dailink_master>;
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simple-audio-card,name = "wm8904-audio";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,routing =
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"Headphone Jack", "HPOUTL",
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"Headphone Jack", "HPOUTR",
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"IN2L", "Line In Jack",
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"IN2R", "Line In Jack",
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"Headphone Jack", "MICBIAS",
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"IN1L", "Headphone Jack";
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simple-audio-card,widgets =
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"Microphone","Headphone Jack",
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"Headphone", "Headphone Jack",
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"Line", "Line In Jack";
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dailink_master: simple-audio-card,codec {
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sound-dai = <&wm8904>;
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};
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simple-audio-card,cpu {
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sound-dai = <&sai3>;
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};
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};
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sound-spdif {
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compatible = "fsl,imx-audio-spdif";
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model = "imx-spdif";
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spdif-controller = <&spdif1>;
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spdif-out;
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spdif-in;
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};
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};
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/* CAN BUS */
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&ecspi2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi2>;
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status = "okay";
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can: can@0 {
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compatible = "microchip,mcp2515";
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reg = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_canbus>;
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clocks = <&osc_can>;
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interrupt-parent = <&gpio1>;
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interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
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spi-max-frequency = <10000000>;
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};
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};
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&fec1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec1>;
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phy-mode = "rgmii-id";
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phy-handle = <ðphy0>;
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fsl,magic-packet;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy0: ethernet-phy@4 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <4>;
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reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
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reset-assert-us = <10000>;
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vddio-supply = <&vddio>;
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vddio: vddio-regulator {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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};
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};
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};
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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wm8904: audio-codec@1a {
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compatible = "wlf,wm8904";
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reg = <0x1a>;
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#sound-dai-cells = <0>;
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clocks = <&clk IMX8MM_CLK_SAI3_ROOT>;
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clock-names = "mclk";
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DCVDD-supply = <®_audio>;
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DBVDD-supply = <®_audio>;
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AVDD-supply = <®_audio>;
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CPVDD-supply = <®_audio>;
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MICVDD-supply = <®_audio>;
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};
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rtc@32 {
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compatible = "epson,rx8025";
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reg = <0x32>;
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};
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};
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/* AUDIO */
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&sai3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sai3>;
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assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
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assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
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assigned-clock-rates = <24576000>;
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status = "okay";
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};
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&spdif1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spdif1>;
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assigned-clocks = <&clk IMX8MM_CLK_SPDIF1>;
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assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
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assigned-clock-rates = <24576000>;
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clocks = <&clk IMX8MM_CLK_AUDIO_AHB>, <&clk IMX8MM_CLK_24M>,
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<&clk IMX8MM_CLK_SPDIF1>, <&clk IMX8MM_CLK_DUMMY>,
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<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>,
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<&clk IMX8MM_CLK_AUDIO_AHB>, <&clk IMX8MM_CLK_DUMMY>,
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<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>,
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<&clk IMX8MM_AUDIO_PLL1_OUT>, <&clk IMX8MM_AUDIO_PLL2_OUT>;
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clock-names = "core", "rxtx0", "rxtx1", "rxtx2", "rxtx3",
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"rxtx4", "rxtx5", "rxtx6", "rxtx7", "spba", "pll8k", "pll11k";
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status = "okay";
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};
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/* USBOTG */
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&usbotg1 {
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dr_mode = "otg";
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usb-role-switch;
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status = "okay";
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port {
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usb_hs_ep: endpoint {
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remote-endpoint = <&high_speed_ep>;
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};
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};
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};
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&usbotg2 {
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dr_mode = "host";
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status = "okay";
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};
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/* Wifi */
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&usdhc1 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
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pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>;
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pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>;
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bus-width = <4>;
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vmmc-supply = <®_wifi_vmmc>;
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cap-power-off-card;
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keep-power-in-suspend;
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non-removable;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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wifi: wifi@1 {
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compatible = "brcm,bcm4329-fmac";
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reg = <1>;
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interrupt-parent = <&gpio2>;
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interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
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interrupt-names = "host-wake";
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};
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};
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/* SD-card */
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&usdhc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2>;
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pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
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cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
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bus-width = <4>;
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status = "okay";
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};
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&iomuxc {
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pinctrl_canbus: canbusgrp {
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fsl,pins = <
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MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x14
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>;
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};
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pinctrl_ecspi2: ecspi2grp {
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fsl,pins = <
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MX8MM_IOMUXC_ECSPI2_SS0_ECSPI2_SS0 0x82
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MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82
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MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82
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MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82
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>;
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};
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pinctrl_usb_otg: usbotggrp {
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fsl,pins = <
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MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x140 /* otg_id */
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MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x19 /* otg_vbus */
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>;
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};
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pinctrl_fec1: fec1grp {
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fsl,pins = <
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MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
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MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
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MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
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MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
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MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
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MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
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MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
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MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
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MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
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MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
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MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
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MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
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MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
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MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
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MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
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MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
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>;
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};
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pinctrl_sai3: sai3grp {
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fsl,pins = <
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MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
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MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
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MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
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MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
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MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6
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>;
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};
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pinctrl_spdif1: spdif1grp {
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fsl,pins = <
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MX8MM_IOMUXC_SPDIF_TX_SPDIF1_OUT 0xd6
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>;
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};
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pinctrl_usdhc1: usdhc1grp {
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fsl,pins = <
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MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
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MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
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MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
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MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
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MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
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MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
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>;
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};
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pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp{
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fsl,pins = <
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MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194
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MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4
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MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4
|
||
|
|
MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4
|
||
|
|
MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4
|
||
|
|
MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196
|
||
|
|
MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6
|
||
|
|
MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6
|
||
|
|
MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6
|
||
|
|
MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6
|
||
|
|
MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usdhc1_gpio: usdhc1-gpiogrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MM_IOMUXC_SD1_RESET_B_GPIO2_IO10 0x41 /* wl_reg_on */
|
||
|
|
MX8MM_IOMUXC_SD1_DATA7_GPIO2_IO9 0x41 /* wl_host_wake */
|
||
|
|
MX8MM_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x141 /* LP0: 32KHz */
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usdhc2: usdhc2grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
|
||
|
|
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
|
||
|
|
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
|
||
|
|
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
|
||
|
|
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
|
||
|
|
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
|
||
|
|
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
|
||
|
|
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
|
||
|
|
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
|
||
|
|
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
|
||
|
|
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
|
||
|
|
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
|
||
|
|
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
|
||
|
|
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
|
||
|
|
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
|
||
|
|
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
};
|