114 lines
2.9 KiB
Plaintext
114 lines
2.9 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
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/*
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* Apple S5L8960X "A7" SoC
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*
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* Other Names: H6, "Alcatraz"
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*
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* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
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* Based on Asahi Linux's M1 (t8103.dtsi) and Corellium's A10 efforts.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/apple-aic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/pinctrl/apple.h>
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/ {
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interrupt-parent = <&aic>;
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#address-cells = <2>;
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#size-cells = <2>;
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clkref: clock-ref {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24000000>;
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clock-output-names = "clkref";
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};
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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compatible = "apple,cyclone";
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reg = <0x0 0x0>;
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cpu-release-addr = <0 0>; /* To be filled by loader */
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enable-method = "spin-table";
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device_type = "cpu";
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};
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cpu1: cpu@1 {
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compatible = "apple,cyclone";
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reg = <0x0 0x1>;
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cpu-release-addr = <0 0>; /* To be filled by loader */
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enable-method = "spin-table";
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device_type = "cpu";
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};
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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nonposted-mmio;
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ranges;
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serial0: serial@20a0a0000 {
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compatible = "apple,s5l-uart";
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reg = <0x2 0x0a0a0000 0x0 0x4000>;
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reg-io-width = <4>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 140 IRQ_TYPE_LEVEL_HIGH>;
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/* Use the bootloader-enabled clocks for now. */
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clocks = <&clkref>, <&clkref>;
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clock-names = "uart", "clk_uart_baud0";
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status = "disabled";
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};
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wdt: watchdog@20e027000 {
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compatible = "apple,s5l8960x-wdt", "apple,wdt";
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reg = <0x2 0x0e027000 0x0 0x1000>;
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clocks = <&clkref>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 4 IRQ_TYPE_LEVEL_HIGH>;
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};
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aic: interrupt-controller@20e100000 {
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compatible = "apple,s5l8960x-aic", "apple,aic";
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reg = <0x2 0x0e100000 0x0 0x100000>;
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#interrupt-cells = <3>;
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interrupt-controller;
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};
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pinctrl: pinctrl@20e300000 {
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compatible = "apple,s5l8960x-pinctrl", "apple,pinctrl";
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reg = <0x2 0x0e300000 0x0 0x100000>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&pinctrl 0 0 200>;
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apple,npins = <200>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 108 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 109 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 110 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 111 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 112 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 113 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 114 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupt-parent = <&aic>;
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interrupt-names = "phys", "virt";
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/* Note that A7 doesn't actually have a hypervisor (EL2 is not implemented). */
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interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
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<AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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