260 lines
12 KiB
YAML
260 lines
12 KiB
YAML
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/brcm,bcm11351-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Broadcom BCM281xx pin controller
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maintainers:
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- Florian Fainelli <florian.fainelli@broadcom.com>
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- Ray Jui <rjui@broadcom.com>
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- Scott Branden <sbranden@broadcom.com>
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allOf:
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- $ref: pinctrl.yaml#
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properties:
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compatible:
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const: brcm,bcm11351-pinctrl
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reg:
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maxItems: 1
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patternProperties:
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'-pins$':
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type: object
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additionalProperties: false
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patternProperties:
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'-grp[0-9]$':
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type: object
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unevaluatedProperties: false
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properties:
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pins:
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description:
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Specifies the name(s) of one or more pins to be configured by
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this node.
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items:
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enum: [ adcsync, bat_rm, bsc1_scl, bsc1_sda, bsc2_scl, bsc2_sda,
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classgpwr, clk_cx8, clkout_0, clkout_1, clkout_2,
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clkout_3, clkreq_in_0, clkreq_in_1, cws_sys_req1,
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cws_sys_req2, cws_sys_req3, digmic1_clk, digmic1_dq,
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digmic2_clk, digmic2_dq, gpen13, gpen14, gpen15, gpio00,
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gpio01, gpio02, gpio03, gpio04, gpio05, gpio06, gpio07,
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gpio08, gpio09, gpio10, gpio11, gpio12, gpio13, gpio14,
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gps_pablank, gps_tmark, hdmi_scl, hdmi_sda, ic_dm, ic_dp,
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kp_col_ip_0, kp_col_ip_1, kp_col_ip_2, kp_col_ip_3,
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kp_row_op_0, kp_row_op_1, kp_row_op_2, kp_row_op_3,
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lcd_b_0, lcd_b_1, lcd_b_2, lcd_b_3, lcd_b_4, lcd_b_5,
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lcd_b_6, lcd_b_7, lcd_g_0, lcd_g_1, lcd_g_2, lcd_g_3,
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lcd_g_4, lcd_g_5, lcd_g_6, lcd_g_7, lcd_hsync, lcd_oe,
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lcd_pclk, lcd_r_0, lcd_r_1, lcd_r_2, lcd_r_3, lcd_r_4,
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lcd_r_5, lcd_r_6, lcd_r_7, lcd_vsync, mdmgpio0, mdmgpio1,
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mdmgpio2, mdmgpio3, mdmgpio4, mdmgpio5, mdmgpio6,
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mdmgpio7, mdmgpio8, mphi_data_0, mphi_data_1, mphi_data_2,
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mphi_data_3, mphi_data_4, mphi_data_5, mphi_data_6,
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mphi_data_7, mphi_data_8, mphi_data_9, mphi_data_10,
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mphi_data_11, mphi_data_12, mphi_data_13, mphi_data_14,
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mphi_data_15, mphi_ha0, mphi_hat0, mphi_hat1, mphi_hce0_n,
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mphi_hce1_n, mphi_hrd_n, mphi_hwr_n, mphi_run0, mphi_run1,
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mtx_scan_clk, mtx_scan_data, nand_ad_0, nand_ad_1,
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nand_ad_2, nand_ad_3, nand_ad_4, nand_ad_5, nand_ad_6,
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nand_ad_7, nand_ale, nand_cen_0, nand_cen_1, nand_cle,
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nand_oen, nand_rdy_0, nand_rdy_1, nand_wen, nand_wp, pc1,
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pc2, pmu_int, pmu_scl, pmu_sda, rfst2g_mtsloten3g,
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rgmii_0_rx_ctl, rgmii_0_rxc, rgmii_0_rxd_0, rgmii_0_rxd_1,
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rgmii_0_rxd_2, rgmii_0_rxd_3, rgmii_0_tx_ctl, rgmii_0_txc,
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rgmii_0_txd_0, rgmii_0_txd_1, rgmii_0_txd_2,
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rgmii_0_txd_3, rgmii_1_rx_ctl, rgmii_1_rxc, rgmii_1_rxd_0,
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rgmii_1_rxd_1, rgmii_1_rxd_2, rgmii_1_rxd_3,
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rgmii_1_tx_ctl, rgmii_1_txc, rgmii_1_txd_0, rgmii_1_txd_1,
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rgmii_1_txd_2, rgmii_1_txd_3, rgmii_gpio_0, rgmii_gpio_1,
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rgmii_gpio_2, rgmii_gpio_3, rtxdata2g_txdata3g1,
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rtxen2g_txdata3g2, rxdata3g0, rxdata3g1, rxdata3g2,
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sdio1_clk, sdio1_cmd, sdio1_data_0, sdio1_data_1,
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sdio1_data_2, sdio1_data_3, sdio4_clk, sdio4_cmd,
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sdio4_data_0, sdio4_data_1, sdio4_data_2, sdio4_data_3,
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sim_clk, sim_data, sim_det, sim_resetn, sim2_clk,
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sim2_data, sim2_det, sim2_resetn, sri_c, sri_d, sri_e,
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ssp_extclk, ssp0_clk, ssp0_fs, ssp0_rxd, ssp0_txd,
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ssp2_clk, ssp2_fs_0, ssp2_fs_1, ssp2_fs_2, ssp2_fs_3,
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ssp2_rxd_0, ssp2_rxd_1, ssp2_txd_0, ssp2_txd_1, ssp3_clk,
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ssp3_fs, ssp3_rxd, ssp3_txd, ssp4_clk, ssp4_fs, ssp4_rxd,
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ssp4_txd, ssp5_clk, ssp5_fs, ssp5_rxd, ssp5_txd, ssp6_clk,
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ssp6_fs, ssp6_rxd, ssp6_txd, stat_1, stat_2, sysclken,
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traceclk, tracedt00, tracedt01, tracedt02, tracedt03,
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tracedt04, tracedt05, tracedt06, tracedt07, tracedt08
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tracedt09, tracedt10, tracedt11, tracedt12, tracedt13
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tracedt14, tracedt15, txdata3g0, txpwrind, uartb1_ucts,
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uartb1_urts, uartb1_urxd, uartb1_utxd, uartb2_urxd,
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uartb2_utxd, uartb3_ucts, uartb3_urts, uartb3_urxd,
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uartb3_utxd, uartb4_ucts, uartb4_urts, uartb4_urxd,
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uartb4_utxd, vc_cam1_scl, vc_cam1_sda, vc_cam2_scl,
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vc_cam2_sda, vc_cam3_scl, vc_cam3_sda ]
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function:
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description:
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Specifies the pin mux selection.
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enum: [ alt1, alt2, alt3, alt4 ]
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slew-rate:
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description: |
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Meaning depends on configured pin mux:
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*_scl or *_sda:
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0: Standard (100 kbps) & Fast (400 kbps) mode
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1: Highspeed (3.4 Mbps) mode
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ic_dm or ic_dp:
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0: normal slew rate
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1: fast slew rate
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Otherwise:
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0: fast slew rate
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1: normal slew rate
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bias-disable: true
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input-disable: true
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input-enable: true
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required:
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- pins
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allOf:
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- $ref: pincfg-node.yaml#
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# Optional properties for standard pins
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- if:
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properties:
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pins:
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contains:
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enum: [ adcsync, bat_rm, classgpwr, clk_cx8, clkout_0,
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clkout_1, clkout_2, clkout_3, clkreq_in_0,
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clkreq_in_1, cws_sys_req1, cws_sys_req2,
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cws_sys_req3, digmic1_clk, digmic1_dq, digmic2_clk,
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digmic2_dq, gpen13, gpen14, gpen15, gpio00, gpio01,
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gpio02, gpio03, gpio04, gpio05, gpio06, gpio07,
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gpio08, gpio09, gpio10, gpio11, gpio12, gpio13,
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gpio14, gps_pablank, gps_tmark, ic_dm, ic_dp,
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kp_col_ip_0, kp_col_ip_1, kp_col_ip_2, kp_col_ip_3,
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kp_row_op_0, kp_row_op_1, kp_row_op_2, kp_row_op_3,
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lcd_b_0, lcd_b_1, lcd_b_2, lcd_b_3, lcd_b_4, lcd_b_5,
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lcd_b_6, lcd_b_7, lcd_g_0, lcd_g_1, lcd_g_2, lcd_g_3,
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lcd_g_4, lcd_g_5, lcd_g_6, lcd_g_7, lcd_hsync,
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lcd_oe, lcd_pclk, lcd_r_0, lcd_r_1, lcd_r_2,
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lcd_r_3, lcd_r_4, lcd_r_5, lcd_r_6, lcd_r_7,
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lcd_vsync, mdmgpio0, mdmgpio1, mdmgpio2, mdmgpio3,
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mdmgpio4, mdmgpio5, mdmgpio6, mdmgpio7, mdmgpio8,
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mphi_data_0, mphi_data_1, mphi_data_2, mphi_data_3,
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mphi_data_4, mphi_data_5, mphi_data_6, mphi_data_7,
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mphi_data_8, mphi_data_9, mphi_data_10,
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mphi_data_11, mphi_data_12, mphi_data_13,
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mphi_data_14, mphi_data_15, mphi_ha0, mphi_hat0,
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mphi_hat1, mphi_hce0_n, mphi_hce1_n, mphi_hrd_n,
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mphi_hwr_n, mphi_run0, mphi_run1, mtx_scan_clk,
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mtx_scan_data, nand_ad_0, nand_ad_1, nand_ad_2,
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nand_ad_3, nand_ad_4, nand_ad_5, nand_ad_6,
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nand_ad_7, nand_ale, nand_cen_0, nand_cen_1,
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nand_cle, nand_oen, nand_rdy_0, nand_rdy_1,
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nand_wen, nand_wp, pc1, pc2, pmu_int,
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rfst2g_mtsloten3g, rgmii_0_rx_ctl, rgmii_0_rxc,
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rgmii_0_rxd_0, rgmii_0_rxd_1, rgmii_0_rxd_2,
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rgmii_0_rxd_3, rgmii_0_tx_ctl, rgmii_0_txc,
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rgmii_0_txd_0, rgmii_0_txd_1, rgmii_0_txd_2,
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rgmii_0_txd_3, rgmii_1_rx_ctl, rgmii_1_rxc,
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rgmii_1_rxd_0, rgmii_1_rxd_1, rgmii_1_rxd_2,
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rgmii_1_rxd_3, rgmii_1_tx_ctl, rgmii_1_txc,
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rgmii_1_txd_0, rgmii_1_txd_1, rgmii_1_txd_2,
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rgmii_1_txd_3, rgmii_gpio_0, rgmii_gpio_1,
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rgmii_gpio_2, rgmii_gpio_3, rtxdata2g_txdata3g1,
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rtxen2g_txdata3g2, rxdata3g0, rxdata3g1, rxdata3g2,
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sdio1_clk, sdio1_cmd, sdio1_data_0, sdio1_data_1,
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sdio1_data_2, sdio1_data_3, sdio4_clk, sdio4_cmd,
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sdio4_data_0, sdio4_data_1, sdio4_data_2,
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sdio4_data_3, sim_clk, sim_data, sim_det,
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sim_resetn, sim2_clk, sim2_data, sim2_det,
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sim2_resetn, sri_c, sri_d, sri_e, ssp_extclk,
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ssp0_clk, ssp0_fs, ssp0_rxd, ssp0_txd, ssp2_clk,
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ssp2_fs_0, ssp2_fs_1, ssp2_fs_2, ssp2_fs_3,
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ssp2_rxd_0, ssp2_rxd_1, ssp2_txd_0, ssp2_txd_1,
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ssp3_clk, ssp3_fs, ssp3_rxd, ssp3_txd, ssp4_clk,
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ssp4_fs, ssp4_rxd, ssp4_txd, ssp5_clk, ssp5_fs,
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ssp5_rxd, ssp5_txd, ssp6_clk, ssp6_fs, ssp6_rxd,
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ssp6_txd, stat_1, stat_2, sysclken, traceclk,
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tracedt00, tracedt01, tracedt02, tracedt03,
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tracedt04, tracedt05, tracedt06, tracedt07,
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tracedt08, tracedt09, tracedt10, tracedt11,
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tracedt12, tracedt13, tracedt14, tracedt15,
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txdata3g0, txpwrind, uartb1_ucts, uartb1_urts,
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uartb1_urxd, uartb1_utxd, uartb2_urxd, uartb2_utxd,
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uartb3_ucts, uartb3_urts, uartb3_urxd, uartb3_utxd,
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uartb4_ucts, uartb4_urts, uartb4_urxd, uartb4_utxd ]
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then:
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properties:
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drive-strength:
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enum: [ 2, 4, 6, 8, 10, 12, 14, 16 ]
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bias-disable: true
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bias-pull-up: true
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bias-pull-down: true
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input-schmitt-enable: true
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input-schmitt-disable: true
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# Optional properties for I2C pins
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- if:
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properties:
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pins:
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contains:
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enum: [ bsc1_scl, bsc1_sda, bsc2_scl, bsc2_sda, pmu_scl,
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pmu_sda, vc_cam1_scl, vc_cam1_sda, vc_cam2_scl,
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vc_cam2_sda, vc_cam3_scl, vc_cam3_sda ]
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then:
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properties:
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bias-pull-up:
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description:
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There are 3 pull-up resistors (1.2k, 1.8k, 2.7k) available
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in parallel for I2C pins.
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enum: [ 568, 720, 831, 1080, 1200, 1800, 2700 ]
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bias-disable: true
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required:
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- compatible
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- reg
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unevaluatedProperties: false
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examples:
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- |
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pinctrl@35004800 {
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compatible = "brcm,bcm11351-pinctrl";
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reg = <0x35004800 0x430>;
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dev-a-active-pins {
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/* group node defining 1 standard pin */
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std-grp0 {
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pins = "gpio00";
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function = "alt1";
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input-schmitt-enable;
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bias-disable;
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slew-rate = <1>;
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drive-strength = <4>;
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};
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/* group node defining 2 I2C pins */
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i2c-grp0 {
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pins = "bsc1_scl", "bsc1_sda";
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function = "alt2";
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bias-pull-up = <720>;
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input-enable;
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};
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/* group node defining 2 HDMI pins */
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hdmi-grp0 {
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pins = "hdmi_scl", "hdmi_sda";
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function = "alt3";
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slew-rate = <1>;
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};
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};
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};
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...
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