127 lines
5.5 KiB
Plaintext
127 lines
5.5 KiB
Plaintext
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What: /sys/devices/platform/HISI04Bx:00/chipX/all_linked
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What: /sys/devices/platform/HISI04Bx:00/chipX/linked_full_lane
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What: /sys/devices/platform/HISI04Bx:00/chipX/crc_err_cnt
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Date: November 2023
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KernelVersion: 6.6
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Contact: Huisong Li <lihuisong@huawei.com>
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Description:
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The /sys/devices/platform/HISI04Bx:00/chipX/ directory
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contains read-only attributes exposing some summarization
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information of all HCCS ports under a specified chip.
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The X in 'chipX' indicates the Xth chip on platform.
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There are following attributes in this directory:
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================= ==== =========================================
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all_linked: (RO) if all enabled ports on this chip are
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linked (bool).
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linked_full_lane: (RO) if all linked ports on this chip are full
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lane (bool).
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crc_err_cnt: (RO) total CRC err count for all ports on this
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chip.
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================= ==== =========================================
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What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/all_linked
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What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/linked_full_lane
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What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/crc_err_cnt
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Date: November 2023
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KernelVersion: 6.6
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Contact: Huisong Li <lihuisong@huawei.com>
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Description:
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The /sys/devices/platform/HISI04Bx:00/chipX/dieY/ directory
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contains read-only attributes exposing some summarization
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information of all HCCS ports under a specified die.
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The Y in 'dieY' indicates the hardware id of the die on chip who
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has chip id X.
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There are following attributes in this directory:
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================= ==== =========================================
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all_linked: (RO) if all enabled ports on this die are
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linked (bool).
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linked_full_lane: (RO) if all linked ports on this die are full
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lane (bool).
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crc_err_cnt: (RO) total CRC err count for all ports on this
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die.
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================= ==== =========================================
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What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/type
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What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/lane_mode
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What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/enable
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What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/cur_lane_num
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What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/link_fsm
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What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/lane_mask
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What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/crc_err_cnt
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Date: November 2023
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KernelVersion: 6.6
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Contact: Huisong Li <lihuisong@huawei.com>
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Description:
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The /sys/devices/platform/HISI04Bx/chipX/dieX/hccsN/ directory
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contains read-only attributes exposing information about
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a HCCS port. The N value in 'hccsN' indicates this port id.
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The X in 'chipX' indicates the ID of the chip to which the
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HCCS port belongs. For example, X ranges from to 'n - 1' if the
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chip number on platform is n.
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The Y in 'dieY' indicates the hardware id of the die to which
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the hccs port belongs.
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Note: type, lane_mode and enable are fixed attributes on running
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platform.
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The HCCS port have the following attributes:
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============= ==== =============================================
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type: (RO) port type (string), e.g. HCCS-v1 -> H32
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lane_mode: (RO) the lane mode of this port (string), e.g. x8
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enable: (RO) indicate if this port is enabled (bool).
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cur_lane_num: (RO) current lane number of this port.
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link_fsm: (RO) link finite state machine of this port.
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lane_mask: (RO) current lane mask of this port, every bit
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indicates a lane.
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crc_err_cnt: (RO) CRC err count on this port.
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============= ==== =============================================
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What: /sys/devices/platform/HISI04Bx:00/used_types
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Date: August 2024
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KernelVersion: 6.12
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Contact: Huisong Li <lihuisong@huawei.com>
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Description:
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This interface is used to show all HCCS types used on the
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platform, like, HCCS-v1, HCCS-v2 and so on.
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What: /sys/devices/platform/HISI04Bx:00/available_inc_dec_lane_types
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What: /sys/devices/platform/HISI04Bx:00/dec_lane_of_type
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What: /sys/devices/platform/HISI04Bx:00/inc_lane_of_type
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Date: August 2024
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KernelVersion: 6.12
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Contact: Huisong Li <lihuisong@huawei.com>
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Description:
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These interfaces under /sys/devices/platform/HISI04Bx/ are
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used to support the low power consumption feature of some
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HCCS types by changing the number of lanes used. The interfaces
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changing the number of lanes used are 'dec_lane_of_type' and
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'inc_lane_of_type' which require root privileges. These
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interfaces aren't exposed if no HCCS type on platform support
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this feature. Please note that decreasing lane number is only
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allowed if all the specified HCCS ports are not busy.
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The low power consumption interfaces are as follows:
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============================= ==== ================================
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available_inc_dec_lane_types: (RO) available HCCS types (string) to
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increase and decrease the number
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of lane used, e.g. HCCS-v2.
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dec_lane_of_type: (WO) input HCCS type supported
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decreasing lane to decrease the
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used lane number of all specified
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HCCS type ports on platform to
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the minimum.
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You can query the 'cur_lane_num'
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to get the minimum lane number
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after executing successfully.
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inc_lane_of_type: (WO) input HCCS type supported
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increasing lane to increase the
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used lane number of all specified
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HCCS type ports on platform to
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the full lane state.
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============================= ==== ================================
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